1Gb: x4, x8, x16 DDR3 SDRAM
Ball Assignments and Descriptions
Figure 8: 96-Ball FBGA – x16 (Top View)
1
2
3
4
5
6
7
8
9
A
B
C
D
E
V
V
SS
V
V
DQ12
UDQS#
UDQS
DQ8
DQ13
DQ15
DDQ
DDQ
V
SSQ
V
DD
V
SS
DQ14
DQ10
V
V
SSQ
DQ11
DQ9
UDM
DQ0
DDQ
DDQ
V
DDQ
V
V
DD
V
SSQ
SSQ
V
V
SSQ
V
V
LDM
SS
SSQ
DDQ
F
V
V
DQ2
DQ6
LDQS
LDQS#
DQ1
DQ3
DDQ
SSQ
G
H
J
V
V
SSQ
V
DD
V
SS
SSQ
V
REFDQ
V
DDQ
V
DQ7
CK
DQ5
DQ4
RAS#
CAS#
WE#
BA2
A0
DDQ
NC
V
SS
V
SS
NC
K
L
CK#
V
CKE
NC
ODT
NC
V
DD
DD
CS#
BA0
A3
A10/AP
NC
ZQ
M
N
P
V
V
V
REFCA
V
SS
SS
A12/BC#
A1
BA1
A4
V
DD
DD
A5
A2
V
V
SS
SS
R
T
V
V
A7
A11
A6
A8
A9
NC
DD
DD
V
RESET#
NC
V
SS
SS
1. Ball descriptions listed in Table 5 (page 23) are listed as “x4, x8” if unique; otherwise,
x4 and x8 are the same.
Notes:
2. A comma separates the configuration; a slash defines a selectable function.
Example D7 = NF, NF/TDQS#. NF applies to the x4 configuration only. NF/TDQS# applies
to the x8 configuration only—selectable between NF or TDQS# via MRS (symbols are de-
fined in Table 5).
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
18
2006 Micron Technology, Inc. All rights reserved.
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