2 MEG x 16
ASYNC/PAGE/BURST FLASH MEMORY
Table 5
Command Descriptions
CODE DEVICE MODE
10h Alt. Program Setup
20h Erase Setup
BUS CYCLE
First
DESCRIPTION
Operates the same as PROGRAM SETUP command
First
Prepares the CSM for the ERASE CONFIRM command. If the next
command is not an ERASE CONFIRM command, the command will be
ignored, and the bank will go to read status mode and wait for
another command.
40h Program Setup
First
A two-cycle command: The first cycle prepares for a PROGRAM
operation, and the second cycle latches addresses and data and
initiates the WSM to execute the program algorithm. The flash outputs
status register data on the rising edge of ADV#, or on the rising clock
edge when ADV# is LOW during synchronous burst mode, or on the
falling edge of OE# or CE#, whichever occurs first.
50h Clear Status
Register
First
First
The WSM can set the block lock status (SR1), VPP status (SR3), program
status (SR4), and erase status (SR5) bits in the status register to “1,” but
it cannot clear them to “0.” Issuing this command clears those bits to
“0.”
60h Protection
Configuration
Setup
Prepares the CSM for changes to the block locking status. If the next
command is not BLOCK UNLOCK, BLOCK LOCK or BLOCK LOCK DOWN
the command will be ignored, and the device will go to read status
mode.
Set Read
Configuration
Register
First
First
Puts the device into the set read configuration mode so that it will
be possible to set the option bits related to burst read mode.
70h Read Status
Register
This command places the device into a read status register mode.
Reading the device will output the contents of the status register for
the addressed bank. The device will automatically enter this mode for
the addressed bank after a PROGRAM or ERASE operation has been
initiated.
90h Read Protection
Configuration
First
Puts the device into the read protection configuration mode so that
reading the device will output the manufacturer/device codes, block
lock status, protection register, or protection register lock status.
98h Read Query
First
First
Puts the device into the read query mode so that reading the device
will output common flash interface information.
B0h Program/Erase
Suspend
Issuing this command will suspend the currently executing PROGRAM/
ERASE operation. The status register will indicate when the
operation has been successfully suspended by setting either the
program suspend (SR2) or erase suspend (SR6), and the WSM status bit
(SR7) to a “1” (ready). The WSM will continue to idle in the suspend
state, regardless of the state of all input control signals except RST#,
which will immediately shut down the WSM and the remainder of the
chip if RST# is driven to VIL.
C0h Program Device
Protection Register
First
First
Writes a specific code into the device protection register.
Lock Device
Locks the device protection register; data can no longer be changed.
Protection Register
(continued on next page)
2 Meg x 16 Async/Page/Burst Flash Memory
MT28F322D20FH_4.p65 – Rev. 4, Pub. 7/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
11
©2002, Micron Technology, Inc.
MICRON [ MICRON TECHNOLOGY ]
