P30-65nm SBC
Table 6:
Command Codes and Definitions (Sheet 2 of 2)
Mode
Code
Device Mode
Description
This command issued to any device address initiates a suspend of the
currently-executing program or block erase operation. The Status Register
indicates successful suspend operation by setting either SR.2 (program
suspended) or SR.6 (erase suspended), along with SR.7 (ready). The WSM
remains in the suspend mode regardless of control signal states (except for
RST# asserted).
Program or Erase
Suspend
0xB0
Suspend
This command issued to any device address resumes the suspended program
or block-erase operation.
0xD0
0x60
0x01
Suspend Resume
Block Lock Setup
Block Lock
First cycle of a 2-cycle command; prepares the CUI for block lock
configuration changes.
If the previous command was Block Lock Setup (0x60), the addressed block
is locked.
If the previous command was Block Lock Setup (0x60), the addressed block
is unlocked. If the addressed block is in a lock-down state, the operation has
no effect.
0xD0
0x2F
Block Unlock
Protection
If the previous command was Block Lock Setup (0x60), the addressed block
is locked down.
Block Lock-Down
First cycle of a 2-cycle command; prepares the device for a OTP Register or
Lock Register program operation. The second cycle latches the register
address and data, and starts the programming algorithm to program data
into the OTP array.
OTP Register or
Lock Register
program setup
0xC0
0x60
0x03
Read Configuration
Register Setup
First cycle of a 2-cycle command; prepares the CUI for device read
configuration.
If the previous command was Read Configuration Register Setup (0x60), the
CUI latches the address and writes A[16:1] to the Read Configuration
Register. Following a Configure RCR command, subsequent read operations
access array data.
Configuration
Read Configuration
Register
First cycle of a 2-cycle command; initiates the Blank Check operation on a
array block.
0xBC
0xD0
Block Blank Check
Blank Check
Block Blank Check
Confirm
Second cycle of blank check command sequence; it latches the block address
and executes blank check on the array block.
This command is used in extended function interface. first cycle of a multiple-
cycle command second cycle is a Sub-Op-Code, the data written on third
cycle is one less than the word count; the allowable value on this cycle are 0
through 511. The subsequent cycles load data words into the program buffer
at a specified address until word count is achieved.
Extended Function
Interface
EFI
0xEB
6.2
Device Command Bus Cycles
Device operations are initiated by writing specific device commands to the CUI. See
Table 7, “Command Bus Cycles” on page 21. Several commands are used to modify
array data including Word Program and Block Erase commands. Writing either
command to the CUI initiates a sequence of internally-timed functions that culminate in
the completion of the requested task. However, the operation can be aborted by either
asserting RST# or by issuing an appropriate suspend command.
Datasheet
20
Apr 2010
Order Number: 208033-02
MICRON [ MICRON TECHNOLOGY ]
