PIC32
REGISTER 19-1: ECR: EJTAG CONTROL REGISTER
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2
25/17/9/1
24/16/8/0
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
R/W-0
Rocc
R-0
R-0
R-0
31:24
23:16
15:8
7:0
Psz<1:0>
R-0
R-0
Halt
U-0
—
R/W-0
PerRst
R/W-0
EjtagBrk
U-0
R-0
PrnW
U-0
—
R/W-0
PrACC
U-0
U-0
—
R/W-0
PrRst
U-0
VPED
R/W-0
ProbEn
U-0
Doze
R/W-0
ProbTrap
U-0
U-0
—
—
—
U-0
—
R-0
DM
U-0
U-0
—
U-0
—
—
—
—
—
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 31-29 See Note 1
bit 28-24 Unimplemented: Read as ‘0’
bit 23-19 See Note 1
bit 18
PrACC: Pending Processor Access and Control bit
This bit indicates a pending processor access and controls finishing of a pending processor access. A write
of ‘0’ finishes processor access if pending. A write of ‘1’ is ignored. A successful FASTDATA access will clear
this bit.
1= Pending processor access
0= No pending preprocessor access
bit 17
bit 16
bit 15
Unimplemented: Read as ‘0’
See Note 1
ProbEn: Processor Access Service Control bit
This bit controls where the probe handles accesses to the DMSEG segment through servicing of processor
accesses.
1= Probe services processor accesses
0= Probe does not service processor access
bit 14
ProbTrap: Debug Exception Vector Control Location bit
This bit controls the location of the debug exception vector.
1= 0xFF200200
0= 0xBFC00480
bit 13
bit 12
Unimplemented: Read as ‘0’
EjtagBrk: Debug Interrupt Exception Request bit
This bit requests a debug interrupt exception to the processor when this bit is written as ‘1’. A write of ‘0’ is
ignored.
1= A debug interrupt exception request is pending
0= A debug interrupt exception request is not pending
bit 11-4 Unimplemented: Read as ‘0’
bit 3
See Note 1
bit 2-0
Unimplemented: Read as ‘0’
Note 1: For descriptions of these bits, please refer to the EJTAG Control Register Field Descriptions in the “EJTAG
Specification” (MD00047), which is available from MIPS Technologies, Inc. (www.mips.com).
DS61145L-page 58
2007-2013 Microchip Technology Inc.