PIC24FJ64GA104 FAMILY
REGISTER 7-19: IPC4: INTERRUPT PRIORITY CONTROL REGISTER 4
U-0
—
R/W-1
CNIP2
R/W-0
CNIP1
R/W-0
CNIP0
U-0
—
R/W-1
CMIP2
R/W-0
CMIP1
R/W-0
CMIP0
bit 15
bit 8
U-0
—
R/W-1
R/W-0
R/W-0
U-0
—
R/W-1
R/W-0
R/W-0
MI2C1IP2
MI2C1IP1
MI2C1IP0
SI2C1IP2
SI2C1IP1
SI2C1IP0
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 15
Unimplemented: Read as ‘0’
bit 14-12
CNIP<2:0>: Input Change Notification Interrupt Priority bits
111= Interrupt is priority 7 (highest priority interrupt)
•
•
•
001= Interrupt is priority 1
000= Interrupt source is disabled
bit 11
Unimplemented: Read as ‘0’
bit 10-8
CMIP<2:0>: Comparator Interrupt Priority bits
111= Interrupt is priority 7 (highest priority interrupt)
•
•
•
001= Interrupt is priority 1
000= Interrupt source is disabled
bit 7
Unimplemented: Read as ‘0’
bit 6-4
MI2C1IP<2:0>: Master I2C1 Event Interrupt Priority bits
111= Interrupt is priority 7 (highest priority interrupt)
•
•
•
001= Interrupt is priority 1
000= Interrupt source is disabled
bit 3
Unimplemented: Read as ‘0’
bit 2-0
SI2C1IP<2:0>: Slave I2C1 Event Interrupt Priority bits
111= Interrupt is priority 7 (highest priority interrupt)
•
•
•
001= Interrupt is priority 1
000= Interrupt source is disabled
DS39951C-page 86
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
