PIC24FJ64GA104 FAMILY
REGISTER 7-23: IPC8: INTERRUPT PRIORITY CONTROL REGISTER 8
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
bit 15
bit 8
U-0
—
R/W-1
R/W-0
R/W-0
U-0
—
R/W-1
R/W-0
R/W-0
SPI2IP2
SPI2IP1
SPI2IP0
SPF2IP2
SPF2IP1
SPF2IP0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
-n = Value at POR
bit 15-7
bit 6-4
Unimplemented: Read as ‘0’
SPI2IP<2:0>: SPI2 Event Interrupt Priority bits
111= Interrupt is priority 7 (highest priority interrupt)
•
•
•
001= Interrupt is priority 1
000= Interrupt source is disabled
bit 3
Unimplemented: Read as ‘0’
bit 2-0
SPF2IP<2:0>: SPI2 Fault Interrupt Priority bits
111= Interrupt is priority 7 (highest priority interrupt)
•
•
•
001= Interrupt is priority 1
000= Interrupt source is disabled
DS39951C-page 90
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
