PIC24FJ64GA104 FAMILY
REGISTER 7-22: IPC7: INTERRUPT PRIORITY CONTROL REGISTER 7
U-0
—
R/W-1
R/W-0
R/W-0
U-0
—
R/W-1
R/W-0
R/W-0
U2TXIP2
U2TXIP1
U2TXIP0
U2RXIP2
U2RXIP1
U2RXIP0
bit 15
bit 8
U-0
—
R/W-1
R/W-0
R/W-0
U-0
—
R/W-1
T5IP2
R/W-0
T5IP1
R/W-0
T5IP0
INT2IP2
INT2IP1
INT2IP0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
-n = Value at POR
bit 15
Unimplemented: Read as ‘0’
bit 14-12
U2TXIP<2:0>: UART2 Transmitter Interrupt Priority bits
111= Interrupt is priority 7 (highest priority interrupt)
•
•
•
001= Interrupt is priority 1
000= Interrupt source is disabled
bit 11
Unimplemented: Read as ‘0’
bit 10-8
U2RXIP<2:0>: UART2 Receiver Interrupt Priority bits
111= Interrupt is priority 7 (highest priority interrupt)
•
•
•
001= Interrupt is priority 1
000= Interrupt source is disabled
bit 7
Unimplemented: Read as ‘0’
bit 6-4
INT2IP<2:0>: External Interrupt 2 Priority bits
111= Interrupt is priority 7 (highest priority interrupt)
•
•
•
001= Interrupt is priority 1
000= Interrupt source is disabled
bit 3
Unimplemented: Read as ‘0’
bit 2-0
T5IP<2:0>: Timer5 Interrupt Priority bits
111= Interrupt is priority 7 (highest priority interrupt)
•
•
•
001= Interrupt is priority 1
000= Interrupt source is disabled
2010 Microchip Technology Inc.
DS39951C-page 89