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PIC24FJ32GA104T-I/PT 参数 Datasheet PDF下载

PIC24FJ32GA104T-I/PT图片预览
型号: PIC24FJ32GA104T-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 44分之28引脚, 16位通用闪存微控制器采用nanoWatt XLP技术 [28/44-Pin, 16-Bit General Purpose Flash Microcontrollers with nanoWatt XLP Technology]
分类和应用: 闪存微控制器
文件页数/大小: 308 页 / 2416 K
品牌: MICROCHIP [ MICROCHIP ]
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TABLE 4-18: PARALLEL MASTER/SLAVE PORT REGISTER MAP  
All  
Resets  
File Name Addr  
Bit 15  
Bit 14  
Bit 13  
Bit 12  
Bit 11  
Bit 10  
Bit 9  
Bit 8  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
PMCON 0600 PMPEN  
PSIDL ADRMUX1 ADRMUX0 PTBEEN PTWREN PTRDEN  
CSF1  
CSF0  
ALP  
CS1P  
BEP  
WRSP  
RDSP  
0000  
0000  
0000  
0000  
0000  
0000  
0000  
0000  
0000  
PMMODE 0602  
PMADDR 0604  
PMDOUT1  
BUSY  
IRQM1  
CS1  
IRQM0  
INCM1  
INCM0  
MODE16 MODE1 MODE0 WAITB1 WAITB0 WAITM3 WAITM2 WAITM1 WAITM0 WAITE1 WAITE0  
ADDR10(1) ADDR9(1) ADDR8(1) ADDR7(1) ADDR6(1) ADDR5(1) ADDR4(1) ADDR3(1) ADDR2(1) ADDR1  
ADDR0  
Parallel Port Data Out Register 1 (Buffers 0 and 1)  
PMDOUT2 0606  
Parallel Port Data Out Register 2 (Buffers 2 and 3)  
PMDIN1  
PMDIN2  
PMAEN  
PMSTAT  
Legend:  
Note 1:  
0608  
060A  
060C  
060E  
Parallel Port Data In Register 1 (Buffers 0 and 1)  
Parallel Port Data In Register 2 (Buffers 2 and 3)  
PTEN14  
IBOV  
PTEN10(1) PTEN9(1) PTEN8(1) PTEN7(1) PTEN6(1) PTEN5(1) PTEN4(1) PTEN3(1) PTEN2(1) PTEN1  
PTEN0  
OB0E  
IBF  
IB3F  
IB2F  
IB1F  
IB0F  
OBE  
OBUF  
OB3E  
OB2E  
OB1E  
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.  
Bits are not available on 28-pin devices; read as ‘0’.  
TABLE 4-19: REAL-TIME CLOCK AND CALENDAR REGISTER MAP  
All  
Resets  
File Name Addr  
Bit 15  
Bit 14  
Bit 13  
Bit 12  
Bit 11  
Bit 10  
Bit 9  
Bit 8  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
ALRMVAL  
0620  
Alarm Value Register Window Based on ALRMPTR<1:0>  
AMASK2 AMASK1 AMASK0 ALRMPTR1 ALRMPTR0 ARPT7 ARPT6  
RTCC Value Register Window Based on RTCPTR<1:0>  
RTCWREN RTCSYNC HALFSEC RTCOE RTCPTR1 RTCPTR0 CAL7 CAL6  
xxxx  
ALCFGRPT 0622 ALRMEN CHIME AMASK3  
ARPT5  
CAL5  
ARPT4  
CAL4  
ARPT3  
CAL3  
ARPT2 ARPT1 ARPT0 0000  
RTCVAL  
RCFGCAL  
Legend:  
0624  
0626  
xxxx  
RTCEN  
CAL2  
CAL1  
CAL0  
xxxx  
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.  
TABLE 4-20: CRC REGISTER MAP  
All  
Resets  
File Name  
Addr  
Bit 15  
Bit 14  
Bit 13  
Bit 12  
Bit 11  
Bit 10  
Bit 9  
Bit 8  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
CRCCON1  
CRCCON2  
CRCXORL  
CRCXORH  
CRCDATL  
CRCDATH  
0640  
0642  
0644  
0646  
0648  
064A  
CRCEN  
CSIDL VWORD4 VWORD3 VWORD2 VWORD1 VWORD0 CRCFUL CRCMPT CRCISEL CRCGO LENDIAN  
PLEN2  
X2  
PLEN1  
X1  
PLEN0  
0000  
0000  
0000  
0000  
xxxx  
xxxx  
xxxx  
xxxx  
DWIDTH4 DWIDTH3 DWIDTH2 DWIDTH1 DWIDTH0  
X7  
X6  
X5  
PLEN4  
X4  
PLEN3  
X3  
X15  
X14  
X30  
X13  
X29  
X12  
X28  
X11  
X27  
X10  
X26  
X9  
X8  
X31  
X25  
X24  
X23  
X22  
X21  
X20  
X19  
X19  
X17  
X16  
CRC Data Input Register Low Word  
CRC Data Input Register High Word  
CRC Result Register Low Word  
CRC Result Register High Word  
CRCWDATL 064C  
CRCWDATH 064E  
Legend:  
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.  
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