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PIC24FJ32GA104T-I/PT 参数 Datasheet PDF下载

PIC24FJ32GA104T-I/PT图片预览
型号: PIC24FJ32GA104T-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 44分之28引脚, 16位通用闪存微控制器采用nanoWatt XLP技术 [28/44-Pin, 16-Bit General Purpose Flash Microcontrollers with nanoWatt XLP Technology]
分类和应用: 闪存微控制器
文件页数/大小: 308 页 / 2416 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC24FJ64GA104 FAMILY  
• Fully Integrated Baud Rate Generator with 16-Bit  
Prescaler  
17.0 UNIVERSAL ASYNCHRONOUS  
RECEIVER TRANSMITTER  
(UART)  
• Baud Rates Ranging from 1 Mbps to 15 bps at  
16 MIPS  
• 4-Deep, First-In-First-Out (FIFO) Transmit Data  
Buffer  
Note:  
This data sheet summarizes the features  
of this group of PIC24F devices. It is not  
intended to be a comprehensive reference  
source. For more information, refer to the  
“PIC24F Family Reference Manual”,  
Section 21. “UART” (DS39708).  
• 4-Deep FIFO Receive Data Buffer  
• Parity, Framing and Buffer Overrun Error Detection  
• Support for 9-Bit mode with Address Detect  
(9th bit = 1)  
• Transmit and Receive Interrupts  
The Universal Asynchronous Receiver Transmitter  
(UART) module is one of the serial I/O modules available  
in the PIC24F device family. The UART is a full-duplex,  
asynchronous system that can communicate with  
peripheral devices, such as personal computers,  
LIN/J2602, RS-232 and RS-485 interfaces. The module  
also supports a hardware flow control option with the  
UxCTS and UxRTS pins, and also includes an IrDA®  
encoder and decoder.  
• Loopback mode for Diagnostic Support  
• Support for Sync and Break Characters  
• Supports Automatic Baud Rate Detection  
• IrDA Encoder and Decoder Logic  
• 16x Baud Clock Output for IrDA Support  
A simplified block diagram of the UART is shown in  
Figure 17-1. The UART module consists of these key  
important hardware elements:  
The primary features of the UART module are:  
• Baud Rate Generator  
• Full-Duplex, 8 or 9-Bit Data Transmission through  
the UxTX and UxRX pins  
• Asynchronous Transmitter  
• Asynchronous Receiver  
• Even, Odd or No Parity Options (for 8-bit data)  
• One or Two Stop bits  
• Hardware Flow Control Option with UxCTS and  
UxRTS pins  
FIGURE 17-1:  
UART SIMPLIFIED BLOCK DIAGRAM  
Baud Rate Generator  
IrDA®  
UxRTS/BCLKx  
UxCTS  
Hardware Flow Control  
UARTx Receiver  
UxRX  
UxTX  
UARTx Transmitter  
Note:  
The UART inputs and outputs must all be assigned to available RPn pins before use. Please see  
Section 10.4 “Peripheral Pin Select (PPS)” for more information.  
2010 Microchip Technology Inc.  
DS39951C-page 183  
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