PIC18F2480/2580/4480/4580
DAW
Decimal Adjust W Register
DECF
Decrement f
Syntax:
DAW
None
Syntax:
DECF f {,d {,a}}
Operands:
Operation:
Operands:
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
If [W<3:0> >9] or [DC = 1] then,
(W<3:0>) + 6 → W<3:0>;
else,
Operation:
(f) – 1 → dest
(W<3:0>) → W<3:0>;
Status Affected:
Encoding:
C, DC, N, OV, Z
0000
01da
ffff
ffff
If [W<7:4> >9] or [C = 1] then,
(W<7:4>) + 6 → W<7:4>;
C = 1,
Description:
Decrement register ‘f’. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
else,
(W<7:4>) → W<7:4>
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank.
Status Affected:
Encoding:
C
0000
0000
0000
0111
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ≤ 95 (5Fh). See
Section 26.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
Description:
DAWadjusts the eight-bit value in W,
resulting from the earlier addition of two
variables (each in packed BCD format)
and produces a correct packed BCD
result.
Words:
Cycles:
1
1
Words:
Cycles:
1
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Q Cycle Activity:
Q1
Decode
Read
register W
Process
Data
Write
W
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write to
destination
Example 1:
DAW
Before Instruction
Example:
DECF
CNT,
1, 0
W
=
=
=
A5h
0
Before Instruction
C
CNT
Z
=
=
01h
0
DC
0
After Instruction
After Instruction
W
=
=
=
05h
1
0
CNT
Z
=
=
00h
1
C
DC
Example 2:
Before Instruction
W
=
=
=
CEh
0
0
C
DC
After Instruction
W
=
=
=
34h
1
0
C
DC
DS39637D-page 386
© 2009 Microchip Technology Inc.