PIC18F2480/2580/4480/4580
TABLE 16-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2
Reset
Values
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
on Page:
INTCON
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RI
RBIE
TO
TMR0IF
PD
INT0IF
POR
RBIF
BOR
55
56
58
58
58
58
58
56
56
56
57
57
57
57
57
57
(2)
RCON
PIR1
IPEN
PSPIF
PSPIE
PSPIP
SBOREN
ADIF
—
RCIF
RCIE
RCIP
TXIF
TXIE
TXIP
SSPIF
SSPIE
SSPIP
CCP1IF
CCP1IE
CCP1IP
TMR2IF
TMR2IE
TMR2IP
TMR1IF
TMR1IE
TMR1IP
PIE1
ADIE
IPR1
ADIP
TRISB
TRISC
TMR2
PORTB Data Direction Register
PORTC Data Direction Register
Timer2 Register
PR2
Timer2 Period Register
T2CON
CCPR1L
CCPR1H
CCP1CON
—
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
—
—
DC1B1
DC1B0
CCP1M3 CCP1M2 CCP1M1 CCP1M0
(1)
ECCPR1L
ECCPR1H
Enhanced Capture/Compare/PWM Register 1 Low Byte
Enhanced Capture/Compare/PWM Register 1 High Byte
(1)
(1)
ECCP1CON EPWM1M1 EPWM1M0 EDC1B1
EDC1B0 ECCP1M3 ECCP1M2 ECCP1M1 ECCP1M0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM or Timer2.
Note 1: These registers are unimplemented on PIC18F2X80 devices.
2: The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as ‘0’. See
Section 5.4 “Brown-out Reset (BOR)”.
© 2009 Microchip Technology Inc.
DS39637D-page 175