PIC18F2480/2580/4480/4580
10.5 RCON Register
The RCON register contains flag bits which are used to
determine the cause of the last Reset or wake-up from
Idle or Sleep modes. RCON also contains the IPEN bit
which enables interrupt priorities.
REGISTER 10-13: RCON: RESET CONTROL REGISTER
R/W-0
IPEN
R/W-1(1)
U-0
—
R/W-1
RI
R-1
TO
R-1
PD
R/W-0(2)
POR
R/W-0
BOR
SBOREN
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
-n = Value at POR
bit 7
bit 6
IPEN: Interrupt Priority Enable bit
1= Enable priority levels on interrupts
0= Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
SBOREN: BOR Software Enable bit(1)
For details of bit operation, see Register 5-1.
Unimplemented: Read as ‘0’
bit 5
bit 4
RI: RESETInstruction Flag bit
For details of bit operation, see Register 5-1.
TO: Watchdog Time-out Flag bit
bit 3
bit 2
bit 1
bit 0
For details of bit operation, see Register 5-1.
PD: Power-Down Detection Flag bit
For details of bit operation, see Register 5-1.
POR: Power-on Reset Status bit(2)
For details of bit operation, see Register 5-1.
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 5-1.
Note 1: If SBOREN is enabled, its Reset state is ‘1’; otherwise, it is ‘0’.
2: The actual Reset value of POR is determined by the type of device Reset. See Register 5-1 for additional
information.
© 2009 Microchip Technology Inc.
DS39637D-page 133
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