PIC18F2450/4450
TABLE 5-2:
REGISTER FILE SUMMARY (PIC18F2450/4450) (CONTINUED)
Value on
POR, BOR on page
Details
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PORTC
PORTB
PORTA
UEP15
UEP14
UEP13
UEP12
UEP11
UEP10
UEP9
UEP8
UEP7
UEP6
UEP5
UEP4
UEP3
UEP2
UEP1
UEP0
UCFG
UADDR
UCON
USTAT
UEIE
RC7
RB7
—
RC6
RB6
RA6(4)
—
RC5(6)
RB5
RA5
—
RC4(6)
RB4
—
RC2
RB2
RA2
RC1
RC0
RB0
RA0
xxxx -xxx 51, 106
xxxx xxxx 51, 100
-x0x 0000 51, 100
RB3
RA3
RB1
RA4
RA1
—
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
UPUEN
ADDR4
PKTDIS
ENDP1
BTOEE
BTOEF
IDLEIE
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPCONDIS EPOUTEN
EPINEN
EPINEN
EPINEN
EPINEN
EPINEN
EPINEN
EPINEN
EPINEN
EPINEN
EPINEN
EPINEN
EPINEN
EPINEN
EPINEN
EPINEN
EPINEN
PPB1
EPSTALL ---0 0000 51, 135
EPSTALL ---0 0000 51, 135
EPSTALL ---0 0000 51, 135
EPSTALL ---0 0000 51, 135
EPSTALL ---0 0000 51, 135
EPSTALL ---0 0000 51, 135
EPSTALL ---0 0000 51, 135
EPSTALL ---0 0000 52, 135
EPSTALL ---0 0000 52, 135
EPSTALL ---0 0000 52, 135
EPSTALL ---0 0000 52, 135
EPSTALL ---0 0000 52, 135
EPSTALL ---0 0000 52, 135
EPSTALL ---0 0000 52, 135
EPSTALL ---0 0000 52, 135
EPSTALL ---0 0000 52, 135
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
UTEYE
—
UOEMON
ADDR6
PPBRST
ENDP3
—
—
UTRDIS
ADDR3
USBEN
ENDP0
DFN8EE
DFN8EF
TRNIE
TRNIF
—
FSEN
ADDR2
RESUME
DIR
PPB0
ADDR0
—
00-0 0000 52, 132
-000 0000 52, 136
-0x0 000- 52, 130
-xxx xxx- 52, 134
0--0 0000 52, 147
0--0 0000 52, 146
-000 0000 52, 145
-000 0000 52, 144
---- -xxx 52, 136
xxxx xxxx 52, 136
ADDR5
SE0
ENDP2
—
ADDR1
SUSPND
PPBI
—
—
—
BTSEE
BTSEF
—
CRC16EE
CRC16EF
ACTVIE
ACTVIF
FRM10
FRM2
CRC5EE
CRC5EF
UERRIE
UERRIF
FRM9
PIDEE
PIDEF
URSTIE
URSTIF
FRM8
FRM0
UEIR
—
—
UIE
SOFIE
SOFIF
—
STALLIE
STALLIF
—
UIR
—
IDLEIF
UFRMH
UFRML
—
—
FRM7
FRM6
FRM5
FRM4
FRM3
FRM1
Legend:
Note 1:
x= unknown, u= unchanged, -= unimplemented, q= value depends on condition. Shaded cells are unimplemented, read as ‘0’.
Bit 21 of the TBLPTRU allows access to the device Configuration bits.
2:
3:
The SBOREN bit is only available when BOREN<1:0> = 01; otherwise, the bit reads as ‘0’.
These registers and/or bits are not implemented on 28-pin devices and are read as ‘0’. Reset values are shown for 40/44-pin devices;
individual unimplemented bits should be interpreted as ‘-’.
4:
5:
6:
RA6 is configured as a port pin based on various primary oscillator modes. When the port pin is disabled, all of the associated bits read ‘0’.
RE3 is only available as a port pin when the MCLRE Configuration bit is clear; otherwise, the bit reads as ‘0’.
RC5 and RC4 are only available as port pins when the USB module is disabled (UCON<3> = 0).
© 2006 Microchip Technology Inc.
Advance Information
DS39760A-page 65
MICROCHIP [ MICROCHIP ]
