PIC18F2450/4450
TABLE 4-4:
Register
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
MCLR Resets,
WDT Reset,
Power-on Reset,
Brown-out Reset
Wake-up via WDT
or Interrupt
Applicable Devices
RESET Instruction,
Stack Resets
TXSTA
RCSTA
EECON2
EECON1
IPIR2
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
2450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
4450
0000 0010
0000 000x
0000 0000
-x-0 x00-
1-1- -1--
0-0- -0--
0-0- -0--
-111 -111
-000 -000
-000 -000
---- -111
1111 1111
11-- -111
1111 1111
-111 1111(5)
---- -xxx
xxxx xxxx
xx-- -xxx
xxxx xxxx
-xxx xxxx(5)
---- x000
xxxx xxxx
xxxx -xxx
xxxx xxxx
-x0x 0000(5)
---0 0000
---0 0000
---0 0000
---0 0000
---0 0000
---0 0000
---0 0000
0000 0010
0000 000x
0000 0000
-u-0 u00-
1-1- -1--
0-0- -0--
0-0- -0--
-111 -111
-000 -000
-000 -000
---- -111
1111 1111
11-- -111
1111 1111
-111 1111(5)
---- -uuu
uuuu uuuu
uu-- -uuu
uuuu uuuu
-uuu uuuu(5)
---- x000
uuuu uuuu
uuuu -uuu
uuuu uuuu
-u0u 0000(5)
---0 0000
---0 0000
---0 0000
---0 0000
---0 0000
---0 0000
---0 0000
uuuu uuuu
uuuu uuuu
0000 0000
-u-0 u00-
u-u- -u--
u-u- -u--(2)
u-u- -u--
-uuu -uuu
-uuu -uuu(2)
-uuu -uuu
uuuu -uuu
uuuu uuuu
uu-- -uuu
uuuu uuuu
-uuu uuuu(5)
---- -uuu
uuuu uuuu
uu-- -uuu
uuuu uuuu
-uuu uuuu(5)
---- uuuu
uuuu uuuu
uuuu -uuu
uuuu uuuu
-uuu uuuu(5)
---u uuuu
---u uuuu
---u uuuu
---u uuuu
---u uuuu
---u uuuu
---u uuuu
PIR2
PIE2
IPR1
PIR1
PIE1
TRISE
TRISD
TRISC
TRISB
TRISA(5)
LATE
LATD
LATC
LATB
LATA(5)
PORTE
PORTD
PORTC
PORTB
PORTA(5)
UEP15
UEP14
UEP13
UEP12
UEP11
UEP10
UEP9
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ‘0’, q= value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
4: See Table 4-3 for Reset value for specific condition.
5: PORTA<6>, LATA<6> and TRISA<6> are enabled depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read ‘0’.
© 2006 Microchip Technology Inc.
Advance Information
DS39760A-page 51
MICROCHIP [ MICROCHIP ]
