欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC18F2450-I/SO 参数 Datasheet PDF下载

PIC18F2450-I/SO图片预览
型号: PIC18F2450-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚,高性能, 12 MIPS ,增强型闪存, USB微控制器采用纳瓦技术 [28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 320 页 / 5591 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F2450-I/SO的Datasheet PDF文件第53页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第54页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第55页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第56页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第58页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第59页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第60页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第61页  
PIC18F2450/4450  
When the stack has been popped enough times to  
unload the stack, the next pop will return a value of zero  
to the PC and sets the STKUNF bit, while the Stack  
Pointer remains at zero. The STKUNF bit will remain  
set until cleared by software or until a POR occurs.  
5.1.2.2  
Return Stack Pointer (STKPTR)  
The STKPTR register (Register 5-1) contains the Stack  
Pointer value, the STKFUL (Stack Full) status bit and  
the STKUNF (Stack Underflow) status bit. The value of  
the Stack Pointer can be 0 through 31. The Stack  
Pointer increments before values are pushed onto the  
stack and decrements after values are popped off the  
stack. On Reset, the Stack Pointer value will be zero.  
The user may read and write the Stack Pointer value.  
This feature can be used by a Real-Time Operating  
System (RTOS) for return stack maintenance.  
Note:  
Returning a value of zero to the PC on an  
underflow has the effect of vectoring the  
program to the Reset vector, where the  
stack conditions can be verified and  
appropriate actions can be taken. This is  
not the same as a Reset, as the contents  
of the SFRs are not affected.  
After the PC is pushed onto the stack 31 times (without  
popping any values off the stack), the STKFUL bit is  
set. The STKFUL bit is cleared by software or by a  
POR.  
5.1.2.3  
PUSHand POPInstructions  
Since the Top-of-Stack is readable and writable, the  
ability to push values onto the stack and pull values off  
the stack, without disturbing normal program execu-  
tion, is a desirable feature. The PIC18 instruction set  
includes two instructions, PUSH and POP, that permit  
the TOS to be manipulated under software control.  
TOSU, TOSH and TOSL can be modified to place data  
or a return address on the stack.  
The action that takes place when the stack becomes  
full depends on the state of the STVREN (Stack  
Overflow Reset Enable) Configuration bit. (Refer to  
Section 18.1 “Configuration Bits” for a description of  
the device Configuration bits.) If STVREN is set  
(default), the 31st push will push the (PC + 2) value  
onto the stack, set the STKFUL bit and reset the  
device. The STKFUL bit will remain set and the Stack  
Pointer will be set to zero.  
The PUSHinstruction places the current PC value onto  
the stack. This increments the Stack Pointer and loads  
the current PC value onto the stack.  
If STVREN is cleared, the STKFUL bit will be set on the  
31st push and the Stack Pointer will increment to 31.  
Any additional pushes will not overwrite the 31st push  
and the STKPTR will remain at 31.  
The POP instruction discards the current TOS by  
decrementing the Stack Pointer. The previous value  
pushed onto the stack then becomes the TOS value.  
REGISTER 5-1:  
STKPTR: STACK POINTER REGISTER  
R/C-0  
STKFUL(1)  
bit 7  
R/C-0  
STKUNF(1)  
U-0  
R/W-0  
SP4  
R/W-0  
SP3  
R/W-0  
SP2  
R/W-0  
SP1  
R/W-0  
SP0  
bit 0  
Legend:  
C = Clearable bit  
W = Writable bit  
‘1’ = Bit is set  
R = Readable bit  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
-n = Value at POR  
bit 7  
bit 6  
STKFUL: Stack Full Flag bit(1)  
1= Stack became full or overflowed  
0= Stack has not become full or overflowed  
STKUNF: Stack Underflow Flag bit(1)  
1= Stack underflow occurred  
0= Stack underflow did not occur  
bit 5  
Unimplemented: Read as ‘0’  
bit 4-0  
SP4:SP0: Stack Pointer Location bits  
Note 1: Bit 7 and bit 6 are cleared by user software or by a POR.  
© 2006 Microchip Technology Inc.  
Advance Information  
DS39760A-page 55  
 复制成功!