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PIC18F2450-I/SO 参数 Datasheet PDF下载

PIC18F2450-I/SO图片预览
型号: PIC18F2450-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚,高性能, 12 MIPS ,增强型闪存, USB微控制器采用纳瓦技术 [28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 320 页 / 5591 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2450/4450  
TABLE 4-4:  
Register  
INITIALIZATION CONDITIONS FOR ALL REGISTERS  
MCLR Resets,  
WDT Reset,  
Power-on Reset,  
Brown-out Reset  
Wake-up via WDT  
or Interrupt  
Applicable Devices  
RESET Instruction,  
Stack Resets  
TOSU  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
2450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
4450  
---0 0000  
0000 0000  
0000 0000  
00-0 0000  
---0 0000  
0000 0000  
0000 0000  
--00 0000  
0000 0000  
0000 0000  
0000 0000  
xxxx xxxx  
xxxx xxxx  
0000 000x  
1111 -1-1  
11-0 0-00  
N/A  
---0 0000  
0000 0000  
0000 0000  
uu-0 0000  
---0 0000  
0000 0000  
0000 0000  
--00 0000  
0000 0000  
0000 0000  
0000 0000  
uuuu uuuu  
uuuu uuuu  
0000 000u  
1111 -1-1  
11-0 0-00  
N/A  
---0 uuuu(1)  
uuuu uuuu(1)  
uuuu uuuu(1)  
uu-u uuuu(1)  
---u uuuu  
uuuu uuuu  
PC + 2(3)  
--uu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu  
uuuu uuuu(2)  
uuuu -u-u(2)  
uu-u u-uu(2)  
N/A  
TOSH  
TOSL  
STKPTR  
PCLATU  
PCLATH  
PCL  
TBLPTRU  
TBLPTRH  
TBLPTRL  
TABLAT  
PRODH  
PRODL  
INTCON  
INTCON2  
INTCON3  
INDF0  
POSTINC0  
POSTDEC0  
PREINC0  
PLUSW0  
FSR0H  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
---- 0000  
xxxx xxxx  
xxxx xxxx  
N/A  
---- 0000  
uuuu uuuu  
uuuu uuuu  
N/A  
---- uuuu  
uuuu uuuu  
uuuu uuuu  
N/A  
FSR0L  
WREG  
INDF1  
POSTINC1  
POSTDEC1  
PREINC1  
PLUSW1  
FSR1H  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
---- 0000  
xxxx xxxx  
---- 0000  
---- 0000  
uuuu uuuu  
---- 0000  
---- uuuu  
uuuu uuuu  
---- uuuu  
FSR1L  
BSR  
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ‘0’, q= value depends on condition.  
Shaded cells indicate conditions do not apply for the designated device.  
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are  
updated with the current value of the PC. The STKPTR is modified to point to the next location in the  
hardware stack.  
2: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).  
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the  
interrupt vector (0008h or 0018h).  
4: See Table 4-3 for Reset value for specific condition.  
5: PORTA<6>, LATA<6> and TRISA<6> are enabled depending on the oscillator mode selected. When not  
enabled as PORTA pins, they are disabled and read ‘0’.  
© 2006 Microchip Technology Inc.  
Advance Information  
DS39760A-page 49  
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