欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC18F2450-I/SO 参数 Datasheet PDF下载

PIC18F2450-I/SO图片预览
型号: PIC18F2450-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚,高性能, 12 MIPS ,增强型闪存, USB微控制器采用纳瓦技术 [28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 320 页 / 5591 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F2450-I/SO的Datasheet PDF文件第183页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第184页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第185页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第186页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第188页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第189页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第190页浏览型号PIC18F2450-I/SO的Datasheet PDF文件第191页  
PIC18F2450/4450  
Depending on the application, the HLVD module does  
not need to be operating constantly. To decrease the  
current requirements, the HLVD circuitry may only  
need to be enabled for short periods where the voltage  
is checked. After doing the check, the HLVD module  
may be disabled.  
17.2 HLVD Setup  
The following steps are needed to set up the HLVD  
module:  
1. Disable the module by clearing the HLVDEN bit  
(HLVDCON<4>).  
2. Write the value to the HLVDL3:HLVDL0 bits that  
selects the desired HLVD trip point.  
17.4 HLVD Start-up Time  
3. Set the VDIRMAG bit to detect high voltage  
The internal reference voltage of the HLVD module,  
specified in electrical specification parameter D420 (see  
Table 21-4 in Section 21.0 “Electrical Characteris-  
tics”), may be used by other internal circuitry, such as  
the Programmable Brown-out Reset. If the HLVD or  
other circuits using the voltage reference are disabled to  
lower the device’s current consumption, the reference  
voltage circuit will require time to become stable before  
a low or high-voltage condition can be reliably detected.  
This start-up time, TIRVST, is an interval that is  
independent of device clock speed. It is specified in  
electrical specification parameter 36 (Table 21-10).  
(VDIRMAG = 1) or low voltage (VDIRMAG = 0).  
4. Enable the HLVD module by setting the  
HLVDEN bit.  
5. Clear the HLVD Interrupt Flag, HLVDIF  
(PIR2<2>), which may have been set from a  
previous interrupt.  
6. Enable the HLVD interrupt, if interrupts are  
desired, by setting the HLVDIE and GIE/GIEH  
bits (PIE2<2> and INTCON<7>). An interrupt  
will not be generated until the IRVST bit is set.  
The HLVD interrupt flag is not enabled until TIRVST has  
expired and a stable reference voltage is reached. For  
this reason, brief excursions beyond the set point may  
not be detected during this interval. Refer to Figure 17-2  
or Figure 17-3.  
17.3 Current Consumption  
When the module is enabled, the HLVD comparator  
and voltage divider are enabled and will consume static  
current. The total current consumption, when enabled,  
is specified in electrical specification parameter D022  
(Section 268 “DC Characteristics”).  
FIGURE 17-2:  
LOW-VOLTAGE DETECT OPERATION (VDIRMAG = 0)  
CASE 1:  
HLVDIF may not be set  
VDD  
VHLVD  
HLVDIF  
Enable HLVD  
IRVST  
TIRVST  
HLVDIF cleared in software  
Internal Reference is stable  
CASE 2:  
VDD  
VHLVD  
HLVDIF  
Enable HLVD  
TIRVST  
IRVST  
Internal Reference is stable  
HLVDIF cleared in software  
HLVDIF cleared in software,  
HLVDIF remains set since HLVD condition still exists  
© 2006 Microchip Technology Inc.  
Advance Information  
DS39760A-page 185