PIC18FXX20
FIGURE 26-8:
CLKO AND I/O TIMING
Q1
Q2
Q3
Q4
OSC1
11
10
CLKO
13
14
12
16
19
18
I/O Pin
(Input)
15
17
I/O Pin
New Value
Old Value
(Output)
20, 21
Refer to Figure 26-6 for load conditions.
Note:
TABLE 26-8: CLKO AND I/O TIMING REQUIREMENTS
Param.
Symbol
Characteristic
Min
Typ
Max
Units Conditions
No.
10
11
12
13
14
15
16
17
18
TosH2ckL
TosH2ckH OSC1 ↑ to CLKO ↑
TckR
TckF
TckL2ioV
TioV2ckH
TckH2ioI
TosH2ioV
TosH2ioI
OSC1 ↑ to CLKO ↓
—
—
—
—
75
75
35
35
—
—
—
50
—
—
200
200
100
100
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(1)
(1)
(1)
(1)
(1)
(1)
(1)
CLKO rise time
CLKO fall time
CLKO ↓ to Port out valid
Port in valid before CLKO ↑
Port in hold after CLKO ↑
OSC1 ↑ (Q1 cycle) to Port out valid
OSC1 ↑ (Q2 cycle) to
Port input invalid
(I/O in hold time)
—
0.5 TCY + 20
0.25 TCY + 25
—
—
150
—
0
—
100
200
PIC18FXX20
PIC18LFXX20
18A
—
19
TioV2osH
TioR
Port input valid to OSC1 ↑
0
—
—
ns
(I/O in setup time)
20
20A
21
21A
22††
23††
24††
Port output rise time
Port output fall time
INT pin high or low time
PIC18FXX20
PIC18LFXX20
PIC18FXX20
PIC18LFXX20
—
—
—
10
—
10
—
—
—
25
60
25
60
—
—
ns
ns
ns
ns
ns
ns
ns
TioF
—
TINP
TRBP
TRCP
TCY
TCY
20
RB7:RB4 change INT high or low time
RC7:RC4 change INT high or low time
†† These parameters are asynchronous events not related to any internal clock edges.
Note 1: Measurements are taken in RC mode, where CLKO output is 4 x TOSC.
2003 Microchip Technology Inc.
Advance Information
DS39609A-page 323
MICROCHIP [ MICROCHIP ]
