PIC18CXX2
FIGURE 9-1: TIMER0 BLOCK DIAGRAM IN 8-BIT MODE
Data Bus
FOSC/4
0
1
8
0
Sync with
Internal
clocks
TMR0
Programmable
Prescaler
RA4/T0CKI
Pin
1
(2 Tcy delay)
T0SE
3
PSA
Set Interrupt
Flag bit TMR0IF
on overflow
T0PS2, T0PS1, T0PS0
T0CS
Note:
Upon reset, Timer0 is enabled in 8-bit mode with clock input from T0CKI max. prescale.
FIGURE 9-2: TIMER0 BLOCK DIAGRAM IN 16-BIT MODE
FOSC/4
0
1
0
1
Sync with
Internal
Clocks
Set Interrupt
Flag bit TMR0IF
on overflow
TMR0
High Byte
TMR0L
Programmable
Prescaler
T0CKI pin
8
(2 Tcy delay)
T0SE
3
Read TMR0L
T0PS2, T0PS1, T0PS0
T0CS
Write TMR0L
PSA
8
8
TMR0H
8
Data Bus<7:0>
Note:
Upon reset, Timer0 is enabled in 8-bit mode with clock input from T0CKI max. prescale.
DS39026B-page 94
Preliminary
7/99 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
