PIC18CXX2
FIGURE 8-1: BLOCK DIAGRAM OF
RA3:RA0 AND RA5 PINS
FIGURE 8-3: BLOCK DIAGRAM OF RA6
ECRA6 or
RCRA6 enable
Data
Bus
RD LATA
RD LATA
Data
Bus
D
Q
Q
VDD
P
D
Q
VDD
P
WR LATA
or
PORTA
CK
WR LATA
or
PORTA
Q
CK
Data Latch
I/O pin(1)
N
Data Latch
D
Q
I/O pin(1)
N
D
Q
WR TRISA
VSS
Analog
Q
CK
WR
TRISA
VSS
input
mode
Q
CK
TRIS Latch
ECRA6 or
TRIS Latch
RCRA6
enable
TTL
Data Bus
Data Bus
RD TRISA
Q
input
TTL
buffer
input
buffer
D
RD TRISA
EN
Q
D
RD PORTA
SS input (RA5 only)
To A/D Converter and LVD Modules
EN
RD PORTA
Note 1: I/O pins have protection diodes to VDD and VSS.
Note 1: I/O pins have protection diodes to VDD and VSS.
FIGURE 8-2: BLOCK DIAGRAM OF RA4/
T0CKI PIN
RD LATA
Data
Bus
D
Q
Q
WR LATA
or
PORTA
CK
I/O pin(1)
N
Data Latch
D
Q
VSS
WR TRISA
Schmitt
Trigger
input
Q
CK
TRIS Latch
buffer
RD TRISA
Q
D
EN
EN
RD PORTA
TMR0 Cock Input
Note 1: I/O pin has protection diodes to VSS only.
DS39026B-page 78
Preliminary
7/99 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
