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PIC18C452-I/L 参数 Datasheet PDF下载

PIC18C452-I/L图片预览
型号: PIC18C452-I/L
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能微控制器,10位A / D [High-Performance Microcontrollers with 10-Bit A/D]
分类和应用: 微控制器
文件页数/大小: 296 页 / 4835 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18CXX2  
Register 14-3: SSPCON2: MSSP Control Register2  
R/W-0  
GCEN  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
RCEN  
R/W-0  
PEN  
R/W-0  
RSEN  
R/W-0  
SEN  
ACKSTAT  
ACKDT  
ACKEN  
bit 7  
bit 0  
bit 7  
bit 6  
GCEN: General Call Enable bit (In I2C slave mode only)  
1= Enable interrupt when a general call address (0000h) is received in the SSPSR  
0= General call address disabled  
ACKSTAT: Acknowledge Status bit (In I2C master mode only)  
In master transmit mode:  
1= Acknowledge was not received from slave  
0= Acknowledge was received from slave  
bit 5  
bit 4  
ACKDT: Acknowledge Data bit (In I2C master mode only)  
In master receive mode:  
Value that will be transmitted when the user initiates an Acknowledge sequence at the end of  
a receive.  
1= Not Acknowledge  
0= Acknowledge  
ACKEN: Acknowledge Sequence Enable bit (In I2C master mode only)  
In master receive mode:  
1= Initiate Acknowledge sequence on SDA and SCL pins, and transmit ACKDT data bit.  
Automatically cleared by hardware.  
0= Acknowledge sequence idle  
bit 3  
bit 2  
RCEN: Receive Enable bit (In I2C master mode only)  
1= Enables Receive mode for I2C  
0= Receive idle  
PEN: Stop Condition Enable bit (In I2C master mode only)  
SCK release control  
1= Initiate Stop condition on SDA and SCL pins. Automatically cleared by hardware.  
0= Stop condition idle  
bit 1  
bit 0  
RSEN: Repeated Start Condition Enabled bit (In I2C master mode only)  
1= Initiate Repeated Start condition on SDA and SCL pins. Automatically cleared by hardware.  
0= Repeated Start condition idle.  
SEN: Start Condition Enabled bit (In I2C master mode only)  
1= Initiate Start condition on SDA and SCL pins. Automatically cleared by hardware.  
0= Start condition idle  
Note: For bits ACKEN, RCEN, PEN, RSEN, SEN: If the I2C module is not in the idle mode,  
this bit may not be set (no spooling) and the SSPBUF may not be written (or writes  
to the SSPBUF are disabled).  
Legend:  
R = Readable bit  
W = Writable bit  
U = Unimplemented bit, read as ‘0’  
’0’ = Bit is cleared x = Bit is unknown  
- n = Value at POR reset  
’1’ = Bit is set  
DS39026B-page 120  
Preliminary  
7/99 Microchip Technology Inc.  
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