PIC18F6525/6621/8525/8621
REGISTER 9-6:
PIR3: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 3
U-0
—
U-0
—
R-0
R-0
R/W-0
R/W-0
R/W-0
R/W-0
CCP3IF
bit 0
RC2IF
TX2IF
TMR4IF
CCP5IF
CCP4IF
bit 7
bit 7-6
bit 5
Unimplemented: Read as ‘0’
RC2IF: USART2 Receive Interrupt Flag bit
1= The USART2 receive buffer, RCREGx, is full (cleared when RCREGx is read)
0= The USART2 receive buffer is empty
bit 4
TX2IF: USART2 Transmit Interrupt Flag bit
1= The USART2 transmit buffer, TXREGx, is empty (cleared when TXREGx is written)
0= The USART2 transmit buffer is full
bit 3
TMR4IF: TMR3 Overflow Interrupt Flag bit
1= TMR4 register overflowed (must be cleared in software)
0= TMR4 register did not overflow
bit 2-0
CCPxIF: CCPx Interrupt Flag bit (ECCP3, CCP4 and CCP5)
Capture mode:
1= A TMR1 or TMR3 register capture occurred (must be cleared in software)
0= No TMR1 or TMR3 register capture occurred
Compare mode:
1= A TMR1 or TMR3 register compare match occurred (must be cleared in software)
0= No TMR1 or TMR3 register compare match occurred
PWM mode:
Unused in this mode.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS39612B-page 94
2005 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
