PIC18F6525/6621/8525/8621
REGISTER 9-5:
PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2
U-0
—
R/W-0
CMIF
U-0
—
R/W-0
EEIF
R/W-0
BCLIF
R/W-0
LVDIF
R/W-0
R/W-0
CCP2IF
bit 0
TMR3IF
bit 7
bit 7
bit 6
Unimplemented: Read as ‘0’
CMIF: Comparator Interrupt Flag bit
1= The comparator input has changed (must be cleared in software)
0= The comparator input has not changed
bit 5
bit 4
Unimplemented: Read as ‘0’
EEIF: Data EEPROM/Flash Write Operation Interrupt Flag bit
1= The write operation is complete (must be cleared in software)
0= The write operation is not complete, or has not been started
bit 3
BCLIF: Bus Collision Interrupt Flag bit
1= A bus collision occurred while the MSSP module (configured in I2C Master mode)
was transmitting (must be cleared in software)
0= No bus collision occurred
bit 2
bit 1
bit 0
LVDIF: Low-Voltage Detect Interrupt Flag bit
1= A low voltage condition occurred (must be cleared in software)
0= The device voltage is above the Low-Voltage Detect trip point
TMR3IF: TMR3 Overflow Interrupt Flag bit
1= TMR3 register overflowed (must be cleared in software)
0= TMR3 register did not overflow
CCP2IF: ECCP2 Interrupt Flag bit
Capture mode:
1= A TMR1 or TMR3 register capture occurred (must be cleared in software)
0= No TMR1 or TMR3 register capture occurred
Compare mode:
1= A TMR1 or TMR3 register compare match occurred (must be cleared in software)
0= No TMR1 or TMR3 register compare match occurred
PWM mode:
Unused in this mode.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
2005 Microchip Technology Inc.
DS39612B-page 93
MICROCHIP [ MICROCHIP ]
