PIC18F6525/6621/8525/8621
TABLE 1-2:
PIC18F6525/6621/8525/8621 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin
Type
Buffer
Type
Pin Name
Description
PIC18F6X2X
PIC18F8X2X
(6)
PORTJ is a bidirectional I/O port
Digital I/O.
.
RJ0/ALE
RJ0
—
62
I/O
O
ST
TTL
ALE
External memory address latch enable.
RJ1/OE
RJ1
—
—
—
—
—
—
—
61
60
59
39
40
41
42
I/O
O
ST
TTL
Digital I/O.
External memory output enable.
OE
RJ2/WRL
RJ2
I/O
O
ST
TTL
Digital I/O.
External memory write low control.
WRL
RJ3/WRH
RJ3
I/O
O
ST
TTL
Digital I/O.
External memory write high control.
WRH
RJ4/BA0
RJ4
I/O
O
ST
TTL
Digital I/O.
System bus byte address 0 control.
BA0
RJ5/CE
RJ5
I/O
O
ST
TTL
Digital I/O
External memory access indicator.
CE
RJ6/LB
RJ6
I/O
O
ST
TTL
Digital I/O.
External memory low byte select.
LB
RJ7/UB
RJ7
I/O
O
ST
TTL
Digital I/O.
External memory high byte select.
UB
VSS
VDD
9, 25,
41, 56
11, 31,
51, 70
P
—
—
Ground reference for logic and I/O pins.
Positive supply for logic and I/O pins.
10, 26,
38, 57
12, 32,
48, 71
P
(8)
AVSS
20
19
26
25
P
P
—
—
Ground reference for analog modules.
Positive supply for analog modules.
(8)
AVDD
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
= Input
= Power
CMOS = CMOS compatible input or output
Analog = Analog input
I
P
O
= Output
OD
= Open-Drain (no P diode to VDD)
Note 1: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX (CONFIG3H<0>) is not set (all
Program Memory modes except Microcontroller).
2: Default assignment for ECCP2/P2A when CCP2MX is set (all devices).
3: External memory interface functions are only available on PIC18F8525/8621 devices.
4: Default assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is set and for
all PIC18F6525/6621 devices.
5: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX is not set (Microcontroller mode).
6: PORTH and PORTJ (and their multiplexed functions) are only available on PIC18F8525/8621 devices.
7: Alternate assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is not set.
8: AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for proper operation of
the part in user or ICSP™ modes. See parameter D001 for details.
9: RG5 is multiplexed with MCLR and is only available when the MCLR Resets are disabled.
DS39612B-page 20
2005 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
