PIC18F6525/6621/8525/8621
TABLE 10-7: PORTD FUNCTIONS
Name
Bit#
Buffer Type
Function
RD0/AD0(2)/PSP0
RD1/AD1(2)/PSP1
RD2/AD2(2)/PSP2
RD3/AD3(2)/PSP3
RD4/AD4(2)/PSP4
RD5/AD5(2)/PSP5
RD6/AD6(2)/PSP6
RD7/AD7(2)/PSP7
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
ST/TTL(1)
ST/TTL(1)
ST/TTL(1)
ST/TTL(1)
ST/TTL(1)
ST/TTL(1)
ST/TTL(1)
ST/TTL(1)
Input/output port pin, address/data bus bit 0 or Parallel Slave Port bit 0.
Input/output port pin, address/data bus bit 1 or Parallel Slave Port bit 1.
Input/output port pin, address/data bus bit 2 or Parallel Slave Port bit 2.
Input/output port pin, address/data bus bit 3 or Parallel Slave Port bit 3.
Input/output port pin, address/data bus bit 4 or Parallel Slave Port bit 4.
Input/output port pin, address/data bus bit 5 or Parallel Slave Port bit 5.
Input/output port pin, address/data bus bit 6 or Parallel Slave Port bit 6.
Input/output port pin, address/data bus bit 7 or Parallel Slave Port bit 7.
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in System Bus or Parallel
Slave Port mode.
2: External memory interface functions are only available on PIC18F8525/8621 devices.
TABLE 10-8: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Value on
all other
Resets
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PORTD
LATD
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
1111 1111 1111 1111
0000 ---- 0000 ----
LATD Data Output Register
PORTD Data Direction Register
TRISD
PSPCON(1)
MEMCON(2) EBDIS
IBF
OBF
—
IBOV PSPMODE
WAIT1 WAIT0
—
—
—
—
—
—
WM1
WM0 0-00 --00 0-00 --00
Legend: x= unknown, u= unchanged, — = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
Note 1: Enabled only in Microcontroller mode for PIC18F8525/8621 devices.
2: This register is unused on PIC18F6525/6621 devices and reads as ‘0’.
2005 Microchip Technology Inc.
DS39612B-page 113
MICROCHIP [ MICROCHIP ]
