PIC18F2220/2320/4220/4320
FIGURE 26-17:
I2C BUS START/STOP BITS TIMING
SCL
SDA
91
93
90
92
Stop
Condition
Start
Condition
Note: Refer to Figure 26-5 for load conditions.
TABLE 26-18: I2C BUS START/STOP BITS REQUIREMENTS (SLAVE MODE)
Param.
Symbol
Characteristic
Min
Max
Units
Conditions
No.
90
TSU:STA Start condition
Setup time
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
4700
600
—
—
—
—
—
—
—
—
ns
Only relevant for Repeated
Start condition
91
92
93
THD:STA Start condition
Hold time
4000
600
ns
ns
ns
After this period, the first
clock pulse is generated
TSU:STO Stop condition
Setup time
4700
600
THD:STO Stop condition
Hold time
4000
600
FIGURE 26-18:
I2C BUS DATA TIMING
103
102
100
101
SCL
90
106
107
91
92
SDA
In
110
109
109
SDA
Out
Note: Refer to Figure 26-5 for load conditions.
DS39599C-page 336
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
