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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
16.4.5.1  
Auto-Shutdown and Automatic  
Restart  
16.4.6  
START-UP CONSIDERATIONS  
When the ECCP module is used in the PWM mode, the  
application hardware must use the proper external pull-  
up and/or pull-down resistors on the PWM output pins.  
When the microcontroller is released from Reset, all of  
the I/O pins are in the high-impedance state. The exter-  
nal circuits must keep the power switch devices in the  
off state until the microcontroller drives the I/O pins with  
the proper signal levels or activates the PWM output(s).  
The auto-shutdown feature can be configured to allow  
automatic restarts of the module following a shutdown  
event. This is enabled by setting the PRSEN bit of the  
PWM1CON register (PWM1CON<7>).  
In Shutdown mode with PRSEN = 1(Figure 16-10), the  
ECCPASE bit will remain set for as long as the cause  
of the shutdown continues. When the shutdown condi-  
tion clears, the ECCPASE bit is cleared. If PRSEN = 0  
(Figure 16-11), once a shutdown condition occurs, the  
ECCPASE bit will remain set until it is cleared by firm-  
ware. Once ECCPASE is cleared, the enhanced PWM  
will resume at the beginning of the next PWM period.  
The CCP1M1:CCP1M0 bits (CCP1CON<1:0>) allow  
the user to choose whether the PWM output signals are  
active-high or active-low for each pair of PWM output  
pins (P1A/P1C and P1B/P1D). The PWM output polar-  
ities must be selected before the PWM pins are config-  
ured as outputs. Changing the polarity configuration  
while the PWM pins are configured as outputs is not  
recommended since it may result in damage to the  
application circuits.  
Note:  
Writing to the ECCPASE bit is disabled  
while a shutdown condition is active.  
Independent of the PRSEN bit setting, if the auto-  
shutdown source is one of the comparators, the shut-  
down condition is a level. The ECCPASE bit cannot be  
cleared as long as the cause of the shutdown persists.  
The P1A, P1B, P1C and P1D output latches may not be  
in the proper states when the PWM module is initialized.  
Enabling the PWM pins for output at the same time as  
the ECCP module may cause damage to the application  
circuit. The ECCP module must be enabled in the proper  
output mode and complete a full PWM cycle before con-  
figuring the PWM pins as outputs. The completion of a  
full PWM cycle is indicated by the TMR2IF bit being set  
as the second PWM period begins.  
The Auto-Shutdown mode can be forced by writing a ‘1’  
to the ECCPASE bit.  
FIGURE 16-10:  
PWM AUTO-SHUTDOWN (PRSEN = 1, AUTO-RESTART ENABLED)  
PWM Period  
PWM Period  
PWM Period  
PWM Activity  
Dead Time  
Duty Cycle  
Dead Time  
Duty Cycle  
Dead Time  
Duty Cycle  
Shutdown Event  
ECCPASE bit  
FIGURE 16-11:  
PWM AUTO-SHUTDOWN (PRSEN = 0, AUTO-RESTART DISABLED)  
PWM Period  
PWM Period  
PWM Period  
PWM Activity  
Dead Time  
Duty Cycle  
Dead Time  
Duty Cycle  
Dead Time  
Duty Cycle  
Shutdown Event  
ECCPASE bit  
ECCPASE  
Cleared by Firmware  
2003 Microchip Technology Inc.  
DS39599C-page 151