PIC18F2220/2320/4220/4320
TABLE 16-2: REGISTERS ASSOCIATED WITH ENHANCED PWM AND TIMER2
Value on
all other
Resets
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
RCON
PIR1
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RI
RBIE
TO
TMR0IF
PD
INT0IF
POR
RBIF
BOR
0000 000x 0000 000u
0--1 11qq 0--q qquu
IPEN
PSPIF
PSPIE
PSPIP
—
—
ADIF
ADIE
ADIP
RCIF
RCIE
RCIP
TXIF
TXIE
TXIP
SSPIF
SSPIE
SSPIP
CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
CCP1IP TMR2IP TMR1IP 1111 1111 1111 1111
0000 0000 0000 0000
PIE1
IPR1
TMR2
Timer2 Module Register
Timer2 Module Period Register
PR2
1111 1111 1111 1111
T2CON
TRISC
TRISD
CCPR1H
CCPR1L
CCP1CON
ECCPAS
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
PORTC Data Direction Register
1111 1111 1111 1111
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
PORTD Data Direction Register
Enhanced Capture/Compare/PWM Register 1 High Byte
Enhanced Capture/Compare/PWM Register 1 Low Byte
P1M1
P1M0
DC1B1
DC1B0
CCP1M3 CCP1M2 CCP1M1 CCP1M0 0000 0000 0000 0000
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1 PSSBD0 0000 0000 0000 0000
PWM1CON PRSEN
PDC6
IRCF2
PDC5
IRCF1
PDC4
IRCF0
PDC3
OSTS
PDC2
IOFS
PDC1
SCS1
PDC0 0000 0000 0000 0000
SCS0 0000 q000 0000 q000
OSCCON
IDLEN
Legend:
x= unknown, u= unchanged, -= unimplemented, read as ‘0’.
Shaded cells are not used by the ECCP module in enhanced PWM mode.
2003 Microchip Technology Inc.
DS39599C-page 153