PIC18F2220/2320/4220/4320
P1A, P1B, P1C and P1D outputs are multiplexed with
the PORTC<2> and PORTD<5:7> data latches. The
TRISC<2> and TRISD<5:7> bits must be cleared to
make the P1A, P1B, P1C and P1D pins output.
16.4.3
FULL-BRIDGE MODE
In Full-Bridge Output mode, four pins are used as out-
puts; however, only two outputs are active at a time. In
the Forward mode, pin RC2/CCP1/P1A is continuously
active and pin RD7/PSP7/P1D is modulated. In the
Reverse mode, RD6/PSP6/P1C pin is continuously
active and RD5/PSP5/P1B pin is modulated. These are
illustrated in Figure 16-6.
FIGURE 16-6:
FULL-BRIDGE PWM OUTPUT
FORWARD MODE
Period
(2)
P1A
Duty Cycle
(2)
(2)
P1B
P1C
(2)
P1D
(1)
(1)
REVERSE MODE
Period
Duty Cycle
(2)
P1A
(2)
P1B
(2)
P1C
(2)
P1D
(1)
(1)
Note 1: At this time, the TMR2 register is equal to the PR2 register.
Note 2: Output signal is shown as active-high.
DS39599C-page 146
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
