PIC18F2220/2320/4220/4320
FIGURE 16-2:
PWM OUTPUT RELATIONSHIPS (ACTIVE-HIGH STATE)
0
PR2+1
Duty
Cycle
SIGNAL
CCP1CON
<7:6>
Period
P1A Modulated
(Single Output)
00
10
(1)
(1)
Delay
Delay
P1A Modulated
P1B Modulated
(Half-Bridge)
P1A Active
P1B Inactive
P1C Inactive
P1D Modulated
P1A Inactive
P1B Modulated
P1C Active
(Full-Bridge,
Forward)
01
(Full-Bridge,
Reverse)
11
P1D Inactive
FIGURE 16-3:
PWM OUTPUT RELATIONSHIPS (ACTIVE-LOW STATE)
0
PR2+1
Duty
Cycle
SIGNAL
CCP1CON
<7:6>
Period
P1A Modulated
P1A Modulated
P1B Modulated
P1A Active
(Single Output)
00
10
(1)
(1)
Delay
Delay
(Half-Bridge)
P1B Inactive
(Full-Bridge,
Forward)
01
P1C Inactive
P1D Modulated
P1A Inactive
P1B Modulated
P1C Active
(Full-Bridge,
Reverse)
11
P1D Inactive
Relationships:
•
•
•
Period = 4 * TOSC * (PR2 + 1) * (TMR2 Prescale Value)
Duty Cycle = TOSC * (CCPR1L<7:0>:CCP1CON<5:4>) * (TMR2 Prescale Value)
Delay = 4 * TOSC * (PWM1CON<6:0>)
Note 1: Dead band delay is programmed using the PWM1CON register (see Section 16.4.4 “Programmable Dead Band Delay”).
DS39599C-page 144
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
