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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
In addition to the expanded functions of the CCP1CON  
16.2 Capture and Compare Modes  
register, the ECCP module has two additional registers  
associated with enhanced PWM operation and  
Auto-Shutdown features:  
The Capture and Compare modes of the ECCP module  
are identical in operation to that of CCP1, as discussed  
in Section 15.3 “Capture Mode” and Section 15.4  
“Compare Mode”. No changes are required when  
moving between these modules on PIC18F2X20 and  
PIC18F4X20 devices.  
• PWM1CON  
• ECCPAS  
All other registers associated with the ECCP module  
are identical to those used for the CCP1 module in  
PIC18F2X20 devices, including register and individual  
bit names. Likewise, the timer assignments and inter-  
actions between the two CCP modules are identical,  
regardless of whether CCP1 is a standard or enhanced  
module.  
16.3 Standard PWM Mode  
When configured in Single Output mode, the ECCP  
module functions identically to the standard CCP  
module in PWM mode, as described in Section 15.4  
“Compare Mode”.  
Note:  
When setting up single output PWM opera-  
tions, users are free to use either of the pro-  
cesses described in Section 15.5.3 “Setup  
for PWM Operation” or Section 16.4.7  
“Setup for PWM Operation”. The latter is  
more generic but will work for either single  
or multi output PWM.  
16.1 ECCP Outputs  
The Enhanced CCP module may have up to four outputs  
depending on the selected operating mode. These out-  
puts, designated P1A through P1D, are multiplexed with  
I/O pins on PORTC and PORTD. The pin assignments  
are summarized in Table 16-1.  
To configure I/O pins as PWM outputs, the proper PWM  
mode must be selected by setting the P1Mn and  
CCP1Mn bits (CCP1CON<7:6> and <3:0>, respec-  
tively). The appropriate TRISC and TRISD direction  
bits for the port pins must also be set as outputs.  
TABLE 16-1: PIN ASSIGNMENTS FOR VARIOUS ECCP MODES  
CCP1CON  
ECCP Mode  
RC2  
RD5  
RD6  
RD7  
Configuration  
Compatible CCP  
00xx11xx  
10xx11xx  
x1xx11xx  
CCP1  
P1A  
RD5/PSP5  
P1B  
RD6/PSP6  
RD6/PSP6  
P1C  
RD7/PSP7  
RD6/PSP6  
P1D  
Dual PWM  
Quad PWM  
P1A  
P1B  
Legend: x= Don’t care. Shaded cells indicate pin assignments not used by ECCP in a given mode.  
Note 1: TRIS register values must be configured appropriately.  
2: With ECCP in Dual or Quad PWM mode, the PSP input/output control of PORTD is overridden by P1B,  
P1C and P1D.  
DS39599C-page 142  
2003 Microchip Technology Inc.