PIC17C75X
Figure E-6 and Figure E-7 show Master-transmitter
and Master-receiver data transfer sequences.
SCL is high), but occurs after a data transfer acknowl-
edge pulse (not the bus-free state). This allows a mas-
ter to send “commands” to the slave and then receive
the requested information or to address a different
slave device. This sequence is shown in Figure E-8.
When a master does not wish to relinquish the bus (by
generating a STOP condition), a repeated START con-
dition (Sr) must be generated. This condition is identi-
cal to the start condition (SDA goes high-to-low while
FIGURE E-6: MASTER-TRANSMITTER SEQUENCE
For 7-bit address:
For 10-bit address:
S Slave AddressR/W A1Slave Address A2
S Slave AddressR/W A Data A Data A/A P
First 7 bits
Second byte
'0' (write)
data transferred
(n bytes - acknowledge)
(write)
A master transmitter addresses a slave receiver with a
7-bit address. The transfer direction is not changed.
Data A
Data A/A P
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
From master to slave
S = Start Condition
A master transmitter addresses a slave receiver
with a 10-bit address.
From slave to master
P = Stop Condition
FIGURE E-7: MASTER-RECEIVER SEQUENCE
For 10-bit address:
S Slave AddressR/W A1Slave Address A2
First 7 bits Second byte
(write)
For 7-bit address:
S Slave AddressR/W A Data A Data A
P
'1' (read) data transferred
(n bytes - acknowledge)
A master reads a slave immediately after the first byte.
SrSlave AddressR/W A3 Data A Data A P
First 7 bits
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
From master to slave
(read)
S = Start Condition
A master transmitter addresses a slave receiver
with a 10-bit address.
From slave to master
P = Stop Condition
FIGURE E-8: COMBINED FORMAT
(read or write)
(n bytes + acknowledge)
S Slave AddressR/W A Data A/A Sr Slave Address R/W A Data A/A P
(write)
Direction of transfer
may change at this point
(read)
Sr = repeated
Start Condition
Transfer direction of data and acknowledgment bits depends on R/W bits.
Combined format:
SrSlave Address R/W A Slave Address A Data A
First 7 bits Second byte
Data A/A Sr Slave Address R/W A Data A
First 7 bits
Data A P
(read)
(write)
Combined format - A master addresses a slave with a 10-bit address, then transmits
data to this slave and reads data from this slave.
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
From master to slave
S = Start Condition
From slave to master
P = Stop Condition
1997 Microchip Technology Inc.
Preliminary
DS30264A-page 269