PIC17C75X
TABLE 14-10: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE TRANSMISSION
Value on
POR,
BOR
Value on all
other resets
(Note1)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
16h, Bank 1
17h, Bank 1
13h, Bank 0
15h, Bank 0
16h, Bank 0
17h, Bank 0
10h, Bank 4
11h, Bank 4
13h, Bank 4
16h, Bank 4
15h, Bank 4
17h, Bank 4
PIR1
RBIF
RBIE
SPEN
CSRC
TX7
TMR3IF TMR2IF TMR1IF CA2IF
TMR3IE TMR2IE TMR1IE CA2IE
CA1IF
CA1IE
FERR
—
TX1IF
TX1IE
OERR
TRMT
TX1
RC1IF
RC1IE
RX9D
TX9D
TX0
0000 0010
0000 0000
0000 -00x
0000 --1x
xxxx xxxx
xxxx xxxx
000- 0010
000- 0000
0000 -00x
xxxx xxxx
0000 --1x
xxxx xxxx
0000 0010
0000 0000
0000 -00u
0000 --1u
uuuu uuuu
uuuu uuuu
000- 0010
000- 0000
0000 -00u
uuuu uuuu
0000 --1u
uuuu uuuu
PIE1
RCSTA1
TXSTA1
TXREG1
SPBRG1
PIR2
RX9
TX9
TX6
SREN
TXEN
TX5
CREN
SYNC
TX4
—
—
TX3
TX2
Baud rate generator register
SSPIF
SSPIE
SPEN
TX7
BCLIF
BCLIE
RX9
ADIF
ADIE
SREN
TX5
—
—
CA4IF
CA4IE
—
CA3IF
CA3IE
FERR
TX2
TX2IF
TX2IE
OERR
TX1
RC2IF
RC2IE
RX9D
TX0
PIE2
RCSTA2
TXREG2
TXSTA2
SPBRG2
CREN
TX4
TX6
TX3
—
CSRC
TX9
TXEN
SYNC
—
TRMT
TX9D
Baud rate generator register
Legend: x= unknown, u= unchanged, -= unimplemented read as a '0', shaded cells are not used for synchronous
slave transmission.
Note 1: Other (non power-up) resets include: external reset through MCLR and Watchdog Timer Reset.
TABLE 14-11: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE RECEPTION
Value on
POR,
BOR
Value on all
other resets
(Note1)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
16h, Bank1
17h, Bank1
13h, Bank0
14h, Bank0
15h, Bank 0
17h, Bank 0
10h, Bank 4
11h, Bank 4
13h, Bank 4
14h, Bank 4
15h, Bank 4
17h, Bank 4
PIR1
RBIF
RBIE
SPEN
RX7
TMR3IF TMR2IF TMR1IF CA2IF
TMR3IE TMR2IE TMR1IE CA2IE
CA1IF
CA1IE
FERR
RX2
TX1IF
TX1IE
OERR
RX1
RC1IF
RC1IE
RX9D
RX0
0000 0010
0000 0000
0000 -00x
xxxx xxxx
0000 --1x
xxxx xxxx
000- 0010
000- 0000
0000 -00x
xxxx xxxx
0000 --1x
xxxx xxxx
0000 0010
0000 0000
0000 -00u
uuuu uuuu
0000 --1u
uuuu uuuu
000- 0010
000- 0000
0000 -00u
uuuu uuuu
0000 --1u
uuuu uuuu
PIE1
RCSTA1
RCREG1
TXSTA1
SPBRG1
PIR2
RX9
RX6
TX9
SREN
RX5
CREN
RX4
—
RX3
—
CSRC
TXEN
SYNC
—
TRMT
TX9D
Baud rate generator register
SSPIF
SSPIE
SPEN
RX7
BCLIF
BCLIE
RX9
ADIF
ADIE
SREN
RX5
—
—
CA4IF
CA4IE
—
CA3IF
CA3IE
FERR
RX2
TX2IF
TX2IE
OERR
RX1
RC2IF
RC2IE
RX9D
RX0
PIE2
RCSTA2
RCREG2
TXSTA2
SPBRG2
CREN
RX4
SYNC
RX6
RX3
—
CSRC
TX9
TXEN
—
TRMT
TX9D
Baud rate generator register
Legend: x= unknown, u= unchanged, -= unimplemented read as a '0', shaded cells are not used for synchronous
slave reception.
Note 1: Other (non power-up) resets include: external reset through MCLR and Watchdog Timer Reset.
DS30264A-page 122
Preliminary
1997 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
