PIC16C745/765
4.2.2.1
STATUS REGISTER
For example, CLRF STATUSwill clear the upper-three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu(where u= unchanged).
The STATUS register, shown in Register 4-1, contains
the arithmetic status of the ALU, the RESET status and
the bank select bits for data memory.
It is recommended that only BCF, BSF, SWAPFand
MOVWFinstructions be used to alter the STATUS regis-
ter. These instructions do not affect the Z, C or DC bits
in the STATUS register. For other instructions which do
not affect status bits, see the "Instruction Set Sum-
mary."
The STATUS register can be the destination for any
instruction, as with any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
Note 1: The C and DC bits operate as borrow and
digit borrow bits, respectively, in subtrac-
tion. See the SUBLW and SUBWF instruc-
tions for examples.
REGISTER 4-1: STATUS REGISTER (STATUS: 03h, 83h, 103h, 183h)
R/W-0
IRP
R/W-0
RP1
R/W-0
RP0
R-1
TO
R-1
PD
R/W-x
Z
R/W-x
DC
R/W-x
(1)
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
C
bit7
bit0
- n = Value at POR reset
bit 7:
IRP: Register Bank Select bit (used for indirect addressing)
1= Bank 2, 3 (100h - 1FFh)
0= Bank 0, 1 (00h - FFh)
bit 6-5: RP<1:0>: Register Bank Select bits (used for direct addressing)
00= Bank 0 (00h - 7Fh)
01= Bank 1 (80h - FFh)
10= Bank 2 (100h - 17Fh)
11= Bank 3 (180h - 1FFh)
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
TO: Time-out bit
1= After power-up, CLRWDTinstruction, or SLEEPinstruction
0= A WDT time-out occurred
PD: Power-down bit
1= After power-up or by the CLRWDTinstruction
0= By execution of the SLEEPinstruction
Z: Zero bit
1= The result of an arithmetic or logic operation is zero
0= The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWFinstructions)(1)
1= A carry-out from the 4th low order bit of the result occurred
0= No carry-out from the 4th low order bit of the result
C: Carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)(1)
1= A carry-out from the most significant bit of the result occurred
0= No carry-out from the most significant bit of the result occurred
Note 1: For borrow the polarity is reversed. A subtraction is executed by adding the two’s complement of the sec-
ond operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the
source register.
DS41124A-page 22
Advanced Information
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
