PIC16C745/765
4.2.2.5
PIR1 REGISTER
Note: Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
This register contains the individual flag bits for the
peripheral interrupts.
REGISTER 4-5: PERIPHERAL INTERRUPT REGISTER1 (PIR1: 0Ch)
R/W-0
R/W-0
ADIF
R-0
R-0
R/W-0
USBIF
R/W-0
R/W-0
R/W-0
(1)
R
W
U
=
=
=
Readable bit
Writable bit
Unimplemented bit,
read as ‘0’
RCIF
TXIF
CCP1IF
TMR2IF TMR1IF
PSPIF
bit7
bit0
-n
=
Value at POR reset
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
PSPIF(1): Parallel Slave Port Read/Write Interrupt Flag bit
1= A read or a write operation has taken place (must be cleared in software)
0= No read or write has occurred
ADIF: A/D Converter Interrupt Flag bit
1= An A/D conversion completed (must be cleared in software)
0= The A/D conversion is not complete
RCIF: USART Receive Interrupt Flag bit
1= The USART receive buffer is full (clear by reading RCREG)
0= The USART receive buffer is empty
TXIF: USART Transmit Interrupt Flag bit
1= The USART transmit buffer is empty (clear by writing to TXREG)
0= The USART transmit buffer is full
USBIF: Universal Serial Bus (USB) Interrupt Flag
1= A USB interrupt condition has occurred. The specific cause can be found by examining the contents
of the UIR and UIE registers.
0= No USB interrupt conditions that are enabled have occurred.
bit 2:
CCP1IF: CCP1 Interrupt Flag bit
Capture Mode
1= A TMR1 register capture occurred (must be cleared in software)
0= No TMR1 register capture occurred
Compare Mode
1= A TMR1 register compare match occurred (must be cleared in software)
0= No TMR1 register compare match occurred
PWM Mode
Unused in this mode
bit 1:
bit 0:
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1= TMR2 to PR2 match occurred (must be cleared in software)
0= No TMR2 to PR2 match occurred
TMR1IF: TMR1 Overflow Interrupt Flag bit
1= TMR1 register overflowed (must be cleared in software)
0= TMR1 register did not overflow
Note 1: PIC16C745 device does not have a parallel slave port implemented. This bit location is reserved on this
device. Always maintain this bit clear.
DS41124A-page 26
Advanced Information
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
