PIC16C745/765
FIGURE 16-6: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
VDD
MCLR
30
Internal
POR
33
PWRT
Time-out
32
OSC
Time-out
Internal
RESET
Watchdog
Timer
RESET
31
34
34
I/O Pins
Note: Refer to Figure 16-2 for load conditions.
FIGURE 16-7: BROWN-OUT RESET TIMING
BVDD
VDD
35
TABLE 16-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,
AND BROWN-OUT RESET REQUIREMENTS
Param No. Sym
Characteristic
Min
Typ†
Max
Units Conditions
30
TMCL
MCLR Pulse Width (low)
2
—
—
µs
VDD = 5V, -40°C to +85°C
31*
TWDT
Watchdog Timer Time-out
Period (No Prescaler)
7
18
33
ms
VDD = 5V, -40°C to +85°C
32
33*
34
TOST
Oscillation Start-up Timer Period
Power-up Timer Period
—
28
—
1024 TOSC
—
—
ms
µs
TOSC = OSC1 period
TPWRT
TIOZ
72
—
132
2.1
VDD = 5V, -40°C to +85°C
I/O Hi-impedance from MCLR
Low or WDT reset
35
TBOR
Brown-out Reset Pulse Width
100
—
—
µs
VDD ≤ BVDD (D005)
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
1999 Microchip Technology Inc.
Advanced Information
DS41124A-page 133
MICROCHIP [ MICROCHIP ]
