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PIC16F716-I-P 参数 Datasheet PDF下载

PIC16F716-I-P图片预览
型号: PIC16F716-I-P
PDF下载: 下载PDF文件 查看货源
内容描述: 8位闪存单片机与A / D转换器和增强型捕捉/比较/ PWM [8-bit Flash-based Microcontroller with A/D Converter and Enhanced Capture/Compare/PWM]
分类和应用: 转换器闪存微控制器
文件页数/大小: 136 页 / 2598 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F716  
It is recommended, therefore, that only BCF, BSF,  
SWAPF and MOVWF instructions are used to alter the  
STATUS register because these instructions do not  
affect the Z, C or DC bits from the STATUS register. For  
other instructions, not affecting any Status bits, see the  
“Instruction Set Summary.”  
2.2.2.1  
STATUS Register  
The STATUS register, shown in Register 2-1, contains  
the arithmetic status of the ALU, the Reset status and  
the bank select bits for data memory.  
The STATUS register can be the destination for any  
instruction, as with any other register. If the STATUS  
register is the destination for an instruction that affects  
the Z, DC or C bits, then the write to these three bits is  
disabled. These bits are set or cleared according to the  
device logic. Furthermore, the TO and PD bits are not  
writable. Therefore, the result of an instruction with the  
STATUS register as destination may be different than  
intended.  
Note 1: The PIC16F716 does not use bits IRP  
and RP1 of the STATUS register. Main-  
tain these bits clear to ensure upward  
compatibility with future products.  
2: The C and DC bits operate as a borrow  
and digit borrow bit, respectively, in  
subtraction.  
For example, CLRF STATUSwill clear the upper-three  
bits and set the Z bit. This leaves the STATUS register  
as 000u u1uu(where u= unchanged).  
REGISTER 2-1:  
STATUS: STATUS REGISTER  
Reserved  
IRP  
Reserved  
RP1  
R/W-0  
RP0  
R-1  
TO  
R-1  
PD  
R/W-x  
Z
R/W-x  
DC  
R/W-x  
C
bit 7  
bit 0  
Legend:  
R = Readable bit  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
-n = Value at POR  
bit 7  
bit 6  
bit 5  
IRP: This bit is reserved and should be maintained as ‘0’  
RP1: This bit is reserved and should be maintained as ‘0’  
RP0: Register Bank Select bit (used for direct addressing)  
1= Bank 1 (80h-FFh)  
0= Bank 0 (00h-7Fh)  
bit 4  
bit 3  
bit 2  
bit 1  
TO: Time-out bit  
1= After power-up, CLRWDTinstruction or SLEEPinstruction  
0= A WDT time-out occurred  
PD: Power-down bit  
1= After power-up or by the CLRWDTinstruction  
0= By execution of the SLEEPinstruction  
Z: Zero bit  
1= The result of an arithmetic or logic operation is zero  
0= The result of an arithmetic or logic operation is not zero  
DC: Digit Carry/Borrow bit (ADDWF, ADDLW,SUBLW,SUBWFinstructions), For Borrow, the polarity is  
reversed.  
1= A carry-out from the 4th low-order bit of the result occurred  
0= No carry-out from the 4th low-order bit of the result  
bit 0  
C: Carry/Borrow bit(1) (ADDWF, ADDLW, SUBLW, SUBWF instructions)  
1= A carry-out from the Most Significant bit of the result occurred  
0= No carry-out from the Most Significant bit of the result occurred  
Note 1: For Borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the sec-  
ond operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high-order or low-order bit  
of the source register.  
© 2007 Microchip Technology Inc.  
DS41206B-page 11  
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