PIC16F/LF1946/47
REGISTER 23-1: SSPxSTAT: SSPx STATUS REGISTER
R/W-0/0
SMP
R/W-0/0
CKE
R-0/0
D/A
R-0/0
P
R-0/0
S
R-0/0
R/W
R-0/0
UA
R-0/0
BF
bit 7
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7
SMP: SPI Data Input Sample bit
SPI Master mode:
1= Input data sampled at end of data output time
0= Input data sampled at middle of data output time
SPI Slave mode:
SMP must be cleared when SPI is used in Slave mode
2
In I C Master or Slave mode:
1 = Slew rate control disabled for standard speed mode (100 kHz and 1 MHz)
0 = Slew rate control enabled for high speed mode (400 kHz)
bit 6
CKE: SPI Clock Edge Select bit (SPI mode only)
In SPI Master or Slave mode:
1= Transmit occurs on transition from active to Idle clock state
0= Transmit occurs on transition from Idle to active clock state
2
In I C™ mode only:
1= Enable input logic so that thresholds are compliant with SMBus specification
0= Disable SMBus specific inputs
2
bit 5
bit 4
D/A: Data/Address bit (I C mode only)
1= Indicates that the last byte received or transmitted was data
0= Indicates that the last byte received or transmitted was address
P: Stop bit
2
(I C mode only. This bit is cleared when the MSSPx module is disabled, SSPxEN is cleared.)
1= Indicates that a Stop bit has been detected last (this bit is ‘0’ on Reset)
0= Stop bit was not detected last
bit 3
bit 2
S: Start bit
2
(I C mode only. This bit is cleared when the MSSPx module is disabled, SSPxEN is cleared.)
1= Indicates that a Start bit has been detected last (this bit is ‘0’ on Reset)
0= Start bit was not detected last
2
R/W: Read/Write bit information (I C mode only)
This bit holds the R/W bit information following the last address match. This bit is only valid from the address match
to the next Start bit, Stop bit, or not ACK bit.
2
In I C Slave mode:
1= Read
0= Write
2
In I C Master mode:
1= Transmit is in progress
0= Transmit is not in progress
OR-ing this bit with SEN, RSEN, PEN, RCEN or ACKEN will indicate if the MSSPx is in Idle mode.
2
bit 1
bit 0
UA: Update Address bit (10-bit I C mode only)
1= Indicates that the user needs to update the address in the SSPxADD register
0= Address does not need to be updated
BF: Buffer Full Status bit
2
Receive (SPI and I C modes):
1= Receive complete, SSPxBUF is full
0= Receive not complete, SSPxBUF is empty
2
Transmit (I C mode only):
1= Data transmit in progress (does not include the ACK and Stop bits), SSPxBUF is full
0= Data transmit complete (does not include the ACK and Stop bits), SSPxBUF is empty
2010 Microchip Technology Inc.
Preliminary
DS41414A-page 283
MICROCHIP [ MICROCHIP ]
