PIC12F635/PIC16F636/639
15.7 DC Characteristics: PIC16F639-I (Industrial) (Continued)
Standard Operating Conditions (unless otherwise stated)
DC CHARACTERISTICS
Operating temperature
Supply Voltage
-40°C ≤ TA ≤ +85°C for industrial
2.0V ≤ VDD ≤ 3.6V
Param
Sym
No.
Characteristic
Min
Typ†
Max
Units
Conditions
VOH
Output High Voltage
I/O ports
D090
D092
VDD – 0.7
VDD – 0.7
—
—
—
—
V
V
IOH = -3.0 mA, VDD = 3.6V (Ind.)
OSC2/CLKOUT (RC mode)
IOH = -1.3 mA, VDD = 3.6V (Ind.)
IOH = -1.0 mA, VDD = 3.6V (Ext.)
Digital Output High Voltage
Analog Front-End (AFE) section
D093
LFDATA/SDIO for Analog Front-End
(AFE)
VDD – 0.5
—
—
—
V
IOH = -400 μA, VDD = 2.0V
Capacitive Loading Specs on
Output Pins
D100
COSC2 OSC2 pin
—
15*
pF
In XT, HS and LP modes when
external clock is used to drive OSC1
D101
D102
CIO
All I/O pins
—
—
—
50*
—
pF
nA
IULP
Ultra Low-power Wake-up Current
Data EEPROM Memory
Byte Endurance
200
D120
ED
100K
10K
1M
100K
—
—
—
E/W -40°C ≤ TA ≤ +85°C
E/W +85°C ≤ TA ≤ +125°C
D120A ED
Byte Endurance
D121
VDRW
VDD for Read/Write
VMIN
5.5
V
Using EECON1 to read/write
VMIN = Minimum operating voltage
D122
D123
TDEW
Erase/Write cycle time
Characteristic Retention
—
5
6
ms
TRETD
40
—
—
Year Provided no other specifications are
violated
D124
TREF
Number of Total Erase/Write Cycles
before Refresh(1)
1M
10M
—
E/W -40°C ≤ TA ≤ +85°C
Program Flash Memory
Cell Endurance
D130
EP
10K
1K
100K
10K
—
—
—
E/W -40°C ≤ TA ≤ +85°C
E/W +85°C ≤ TA ≤ +125°C
D130A ED
Cell Endurance
D131
D132
D133
D134
VPR
VDD for Read
VMIN
4.5
—
5.5
5.5
2.5
—
V
V
VMIN = Minimum operating voltage
VPEW
TPEW
TRETD
VDD for Erase/Write
Erase/Write cycle time
Characteristic Retention
—
2
ms
40
—
Year Provided no other specifications are
violated
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
In RC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended to use an external clock in RC
mode.
Note 1:
2:
3:
Negative current is defined as current sourced by the pin.
The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating
conditions. Higher leakage current may be measured at different input voltages.
See Section 9.4.1 “Using the Data EEPROM” for additional information
4:
DS41232D-page 176
© 2007 Microchip Technology Inc.
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