PIC12F635/PIC16F636/639
REGISTER 11-2: CONFIGURATION REGISTER 1
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
DATOUT1 DATOUT0 LCXTUN5 LCXTUN4 LCXTUN3 LCXTUN2 LCXTUN1 LCXTUN0
bit 8
R1PAR
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 8-7
DATOUT<1:0>: LFDATA Output type bit
00= Demodulated output
01= Carrier Clock output
10= RSSI output
11= RSSI output
bit 6-1
bit 0
LCXTUN<5:0>: LCX Tuning Capacitance bit
000000= +0 pF (Default)
:
111111= +63 pF
R1PAR: Register Parity Bit – set/cleared so the 9-bit register contains odd parity – an odd number of set
bits
REGISTER 11-3: CONFIGURATION REGISTER 2
R/W-0
RSSIFET
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
CLKDIV
LCYTUN5 LCYTUN4 LCYTUN3 LCYTUN2 LCYTUN1 LCYTUN0
R2PAR
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 8
RSSIFET: Pull-down MOSFET on LFDATA pad bit (controllable by user in the RSSI mode only)
1= Pull-down RSSI MOSFET on
0= Pull-down RSSI MOSFET off
bit 7
CLKDIV: Carrier Clock Divide-by bit
1= Carrier Clock/4
0= Carrier Clock/1
bit 6-1
LCYTUN<5:0>: LCY Tuning Capacitance bit
000000= +0 pF (Default)
:
111111= +63 pF
bit 0
R2PAR: Register Parity Bit – set/cleared so the 9-bit register contains odd parity – an odd number of set
bits
DS41232D-page 124
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
