PIC12F683
TABLE 4-1:
SUMMARY OF REGISTERS ASSOCIATED WITH GPIO
Value on
all other
Resets
Value on:
POR, BOD
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
05h
GPIO
—
GIE
—
—
GP5
T0IE
—
GP4
INTE
CINV
T0SE
GP3
GPIE
CIS
GP2
T0IF
CM2
PS2
GP1
INTF
CM1
PS1
GP0
--xx xx00 --uu uu00
0Bh/8Bh INTCON
PEIE
COUT
GPIF 0000 0000 0000 0000
19h
CMCON0
CM0
PS0
-0-0 0000 -0-0 0000
1111 1111 1111 1111
81h
OPTION_REG GPPU INTEDG T0CS
PSA
85h
TRISIO
WPU
—
—
—
—
—
—
—
TRISIO5 TRISIO4 TRISIO3 TRISIO2 TRISIO1 TRISIO0 --11 1111 --11 1111
95h
WPU5
IOC5
WPU4
IOC4
—
WPU2
IOC2
WPU1
IOC1
WPU0 --11 -111 --11 -111
IOC0 --00 0000 --00 0000
ANS0 -000 1111 -000 1111
96h
IOC
IOC3
9Fh
ANSEL
ADCS2 ADCS1 ADCS0 ANS3
ANS2
ANS1
Legend:
x= unknown, u= unchanged, — = unimplemented locations read as ‘0’. Shaded cells are not used by GPIO.
DS41211B-page 38
Preliminary
2004 Microchip Technology Inc.