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PIC12F683-I/SNG 参数 Datasheet PDF下载

PIC12F683-I/SNG图片预览
型号: PIC12F683-I/SNG
PDF下载: 下载PDF文件 查看货源
内容描述: [8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO8, 3.90 MM, PLASTIC, SOIC-8]
分类和应用: 闪存微控制器
文件页数/大小: 148 页 / 2282 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC12F683  
EXAMPLE 4-2:  
ULTRA LOW-POWER  
4.2.4  
PIN DESCRIPTIONS AND DIAGRAMS  
WAKE-UP INITIALIZATION  
Each GPIO pin is multiplexed with other functions. The  
pins and their combined functions are briefly described  
here. For specific information about individual functions  
such as the comparator or the A/D, refer to the  
appropriate section in this data sheet.  
BCF  
STATUS,RP0  
;Bank 0  
;Set GP0 data latch  
;Turn off  
; comparator  
;Bank 1  
BSF  
GPIO,0  
MOVLW  
MOVWF  
BSF  
BCF  
BCF  
CALL  
BSF  
BSF  
H’7’  
CMCON0  
STATUS,RP0  
ANSEL,0  
TRISIO,0  
CapDelay  
PCON,ULPWUE  
IOC,0  
;GP0 to digital I/O  
;Output high to  
; charge capacitor  
;Enable ULP Wake-up  
;Select GP0 IOC  
;GP0 to input  
;Enable interrupt  
; and clear flag  
;Wait for IOC  
4.2.4.1  
GP0/AN0/CIN+/ICSPDAT/ULPWU  
Figure 4-1 shows the diagram for this pin. The GP0 pin  
is configurable to function as one of the following:  
• a general purpose I/O  
BSF  
TRISIO,0  
B’10001000’  
INTCON  
• an analog input for the A/D  
MOVLW  
MOVWF  
SLEEP  
• an analog input to the comparator  
• an analog input to the Ultra Low-Power Wake-up  
• In-Circuit Serial Programming data  
FIGURE 4-1:  
BLOCK DIAGRAM OF GP0  
Analog  
Input Mode(1)  
VDD  
Data Bus  
D
Q
Q
Weak  
CK  
WR  
WPU  
GPPU  
RD  
WPU  
VDD  
D
Q
Q
I/O pin  
WR  
CK  
GPIO  
VSS  
-
+
VT  
D
Q
Q
WR  
TRISIO  
CK  
IULP  
0
1
RD  
TRISIO  
Analog  
Input Mode(1)  
VSS  
ULPWUE  
RD  
GPIO  
D
Q
Q
Q
D
D
CK  
WR  
IOC  
Q3  
EN  
RD  
IOC  
Q
EN  
Interrupt-on-  
Change  
RD GPIO  
To Comparator  
To A/D Converter  
Note 1: Comparator mode and ANSEL determines Analog Input mode.  
DS41211B-page 34  
Preliminary  
2004 Microchip Technology Inc.  
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