MCP2515
REGISTER 6-3:
EFLG – ERROR FLAG
(ADDRESS: 2Dh)
R/W-0
R/W-0
R-0
R-0
R-0
R-0
R-0
R-0
RX1OVR RX0OVR
bit 7
TXBO
TXEP
RXEP
TXWAR
RXWAR
EWARN
bit 0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
RX1OVR: Receive Buffer 1 Overflow Flag bit
- Set when a valid message is received for RXB1 and CANINTF.RX1IF = 1
- Must be reset by MCU
RX0OVR: Receive Buffer 0 Overflow Flag bit
- Set when a valid message is received for RXB0 and CANINTF.RX0IF = 1
- Must be reset by MCU
TXBO: Bus-Off Error Flag bit
- Bit set when TEC reaches 255
- Reset after a successful bus recovery sequence
TXEP: Transmit Error-Passive Flag bit
- Set when TEC is equal to or greater than 128
- Reset when TEC is less than 128
RXEP: Receive Error-Passive Flag bit
- Set when REC is equal to or greater than 128
- Reset when REC is less than 128
TXWAR: Transmit Error Warning Flag bit
- Set when TEC is equal to or greater than 96
- Reset when TEC is less than 96
RXWAR: Receive Error Warning Flag bit
- Set when REC is equal to or greater than 96
- Reset when REC is less than 96
EWARN: Error Warning Flag bit
- Set when TEC or REC is equal to or greater than 96 (TXWAR or RXWAR = 1)
- Reset when both REC and TEC are less than 96
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
‘1’ = Bit is set
© 2005 Microchip Technology Inc.
Preliminary
DS21801D-page 47
MICROCHIP [ MICROCHIP ]
