MCP2515
REGISTER 5-3:
CNF3 - CONFIGURATION 1 (ADDRESS: 28h)
R/W-0
SOF
R/W-0
U-0
—
U-0
—
U-0
—
R/W-0
R/W-0
R/W-0
WAKFIL
PHSEG22 PHSEG21 PHSEG20
bit 0
bit 7
bit 7
bit 6
SOF: Start-of-Frame signal bit
If CANCTRL.CLKEN = 1:
1= CLKOUT pin enabled for SOF signal
0= CLKOUT pin enabled for clockout function
If CANCTRL.CLKEN = 0, Bit is don’t care.
WAKFIL: Wake-up Filter bit
1= Wake-up filter enabled
0= Wake-up filter disabled
bit 5-3
bit 2-0
Unimplemented: Reads as ‘0’
PHSEG2: PS2 Length bits<2:0>
(PHSEG2 + 1) x TQ
Note: Minimum valid setting for PS2 is 2 TQ
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
‘1’ = Bit is set
© 2005 Microchip Technology Inc.
Preliminary
DS21801D-page 43
MICROCHIP [ MICROCHIP ]
