KSZ8041NL/RNL
TABLE 2-1:
Pin Number
KSZ8041NL PIN DESCRIPTION (CONTINUED)
Buffer Type
(Note 2-1)
Symbol
Description
Interrupt Output: Programmable Interrupt Output
Register 1Bh is the Interrupt Control/Status Register for program-
ming the interrupt conditions and reading the interrupt status. Regis-
ter 1Fh bit 9 sets the interrupt output to active low (default) or active
high.
21
INTRP
TXC
Opu
MII mode: Transmit Clock Output
22
23
O
I
MII mode: Transmit Enable Input
RMII mode: Transmit Enable Input
TXEN /
TX_EN
MII mode: Transmit Data Input[0] (Note 2-4)
RMII mode: Transmit Data Input[0] (Note 2-5)
TXD0 /
TXD[0]
24
25
I
I
MII mode: Transmit Data Input[1] (Note 2-4)
RMII mode: Transmit Data Input[1] (Note 2-5)
TXD1 /
TXD[1]
MII mode: Transmit Data Input[2] (Note 2-4)
MII mode: Transmit Data Input[3] (Note 2-4)
26
27
TXD2
TXD3
I
I
MII mode: Collision Detect Output
Config mode: The pull-up/pull-down value is latched as CONFIG0
during power-up or reset. See “Strap-In option – KSZ8041NL” for
details.
28
29
COL/CONFIG0
CRS/CONFIG1
Ipd/O
Ipd/O
MII mode: Collision Sense Output
Config mode: The pull-up/pull-down value is latched as CONFIG1
during power-up or reset. See “Strap-In option – KSZ8041NL” for
details.
DS00002245B-page 8
2017 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
