KSZ8041NL/RNL
2.3
KSZ8041RNL Pin Description and Configuration
FIGURE 2-2:
KSZ8041RNL 32-QFN PIN ASSIGNMENT (TOP VIEW)
32
31
30
29
28
27
26
25
GND
1
2
3
4
5
6
7
8
24 TXD0
23 TX_EN
22 NC
VDDPLL_1.8
VDDA_3.3
RX-
Paddle
21 INTRP
Ground
RX_ER /
ISO
RX+
20
(on bottom of chip)
TX-
19 REF_CLK
CRS_DV /
18
TX+
CONFIG2
XO
17 VDDIO_3.3
9
10
11
12
13
14
15
16
TABLE 2-3:
Pin Number
1
KSZ8041RNL PIN DESCRIPTION
Pin Name
Type (Note 2-1)
Pin Function
GND
Gnd
Ground
1.8V Analog VDD
Decouple with 1.0-µF and 0.1-µF capacitors to ground.
2
VDDPLL_1.8
P
3
4
5
6
7
VDDA_3.3
RX-
P
3.3V Analog VDD
I/O
I/O
I/O
I/O
Physical receive or transmit signal (- differential)
Physical receive or transmit signal (+ differential)
Physical transmit or receive signal (- differential)
Physical transmit or receive signal (+ differential)
RX+
TX-
TX+
Crystal Feedback for 25-MHz Crystal
This pin is a no connect if an oscillator or an external clock
source is used.
8
9
XO
XI
O
I
Crystal/Oscillator/External Clock Input
25 MHz ±50 ppm
Set physical transmit output current.
Connect a 6.49-k resistor in parallel with a 100-pF capaci-
tor to ground on this pin. See KSZ8041RNL reference
schematics.
10
REXT
I/O
DS00002245B-page 12
2017 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
