6.2
Idle Mode
When the SM2..0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle mode, stopping the CPU but
allowing SPI, UART, analog comparator, ADC, Timer/Counters, watchdog, and the interrupt system to continue operating.
This sleep mode basically halt clkCPU and clkFLASH, while allowing the other clocks to run.
Idle mode enables the MCU to wake up from external triggered interrupts as well as internal ones like the timer overflow and
UART transmit complete interrupts. If wake-up from the analog comparator interrupt is not required, the analog comparator
can be powered down by setting the ACD bit in the analog comparator control and status register – ACSR. This will reduce
power consumption in Idle mode. If the ADC is enabled, a conversion starts automatically when this mode is entered.
6.3
ADC noise reduction Mode
When the SM2..0 bits are written to 001, the SLEEP instruction makes the MCU enter ADC noise reduction mode, stopping
the CPU but allowing the ADC, the External Interrupts, Timer/Counter (if their clock source is external - T0 or T1) and the
watchdog to continue operating (if enabled). This sleep mode basically halts clkI/O, clkCPU, and clkFLASH, while allowing the
other clocks to run.
This improves the noise environment for the ADC, enabling higher resolution measurements. If the ADC is enabled, a
conversion starts automatically when this mode is entered. Apart from the ADC conversion complete interrupt, only an
external reset, a watchdog reset, a brown-out reset, a Timer/Counter interrupt, an SPM/EEPROM ready interrupt, an
external level interrupt on INT3:0 can wake up the MCU from ADC noise reduction mode.
6.4
Power-down Mode
When the SM2..0 bits are written to 010, the SLEEP instruction makes the MCU enter power-down mode. In this mode, the
external oscillator is stopped, while the external interrupts and the watchdog continue operating (if enabled). Only an
external reset, a watchdog reset, a brown-out reset, a PSC interrupt, an external level interrupt on INT3:0 can wake up the
MCU. This sleep mode basically halts all generated clocks, allowing operation of asynchronous modules only.
Note that if a level triggered interrupt is used for wake-up from power-down mode, the changed level must be held for some
time to wake up the MCU. Refer to Section 10. “External Interrupts” on page 70 for details.
When waking up from power-down mode, there is a delay from the wake-up condition occurs until the wake-up becomes
effective. This allows the clock to restart and become stable after having been stopped. The wake-up period is defined by the
same CKSEL fuses that define the reset time-out period, as described in Section 5.2 “Clock Sources” on page 26.
6.5
Standby Mode
When the SM2..0 bits are 110 and an external crystal/resonator clock option is selected, the SLEEP instruction makes the
MCU enter Standby mode. This mode is identical to Power-down with the exception that the Oscillator is kept running. From
Standby mode, the device wakes up in six clock cycles.
Table 6-2. Active Clock Domains and Wake-up Sources in the Different Sleep Modes
Active Clock Domains
Oscillators
Wake-up Sources
Sleep Mode
Idle
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
ADC Noise
Reduction
X(2)
Power-down
Standby(1)
X(2)
X(2)
X
X
X
Notes: 1. Only recommended with external crystal or resonator selected as clock source.
2. Only level interrupt.
ATmega16/32/64/M1/C1 [DATASHEET]
35
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
