Table 7-1. Reset Characteristics
Parameter
Symbol
Min
1.1
0.8
Typ
1.4
0.9
Max
1.7
Unit
V
Power-on reset threshold voltage (rising)
Power-on reset threshold voltage (falling)(1)
VPOT
1.6
V
VCC max. start voltage to ensure internal power-on reset
signal
VPORMAX
VPORMIN
0.4
V
V
VCC min. start voltage to ensure internal power-on reset
signal
–0.1
VCC rise rate to ensure power-on reset
RESET pin threshold voltage
VCCRR
VRST
tRST
0.01
0.1 VCC
2.5
V/ms
V
0.9VCC
-
Minimum pulse width on RESET pin
-
µs
Note:
1. Before rising, the supply has to be between VPORMIN and VPORMAX to ensure a reset.
7.2.1 Power-on Reset
A power-on reset (POR) pulse is generated by an on-chip detection circuit. The detection level is defined in Table 7-1. The
POR is activated whenever VCC is below the detection level. The POR circuit can be used to trigger the start-up Reset, as
well as to detect a failure in supply voltage.
A power-on reset (POR) circuit ensures that the device is reset from power-on. Reaching the power-on reset threshold
voltage invokes the delay counter, which determines how long the device is kept in RESET after VCC rise. The RESET signal
is activated again, without any delay, when VCC decreases below the detection level.
Figure 7-2. MCU Start-up, RESET Tied to VCC
VCCRR
VCC
VPORMAX
VPORMIN
RESET
VRST
tTOUT
TIME-OUT
INTERNAL
RESET
Figure 7-3. MCU Start-up, RESET Extended Externally
VPOT
VCC
VRST
RESET
tTOUT
TIME-OUT
INTERNAL
RESET
ATmega16/32/64/M1/C1 [DATASHEET]
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