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ATMEGA16M1-15MZ 参数 Datasheet PDF下载

ATMEGA16M1-15MZ图片预览
型号: ATMEGA16M1-15MZ
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT 16KB FLASH 32QFN]
分类和应用: 微控制器
文件页数/大小: 318 页 / 7595 K
品牌: MICROCHIP [ MICROCHIP ]
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7.  
System Control and Reset  
7.1  
Resetting the AVR  
During reset, all I/O registers are set to their initial values, and the program starts execution from the reset Vector. The  
instruction placed at the reset vector must be a JMP – Absolute Jump – instruction to the reset handling routine. If the  
program never enables an interrupt source, the interrupt vectors are not used, and regular program code can be placed at  
these locations. This is also the case if the reset vector is in the application section while the interrupt vectors are in the boot  
section or vice versa. The circuit diagram in Figure 7-1 on page 38 shows the reset logic. Table 7-1 on page 39 defines the  
electrical parameters of the reset circuitry.  
The I/O ports of the AVR® are immediately reset to their initial state when a reset source goes active. This does not require  
any clock source to be running. After all reset sources have gone inactive, a delay counter is invoked, stretching the internal  
reset. This allows the power to reach a stable level before normal operation starts. The time-out period of the delay counter  
is defined by the user through the SUT and CKSEL Fuses. The different selections for the delay period are presented in  
Section 5.2 “Clock Sources” on page 26.  
7.2  
Reset Sources  
The Atmel ATmega16/32/64/M1/C1 has four sources of reset:  
Power-on reset. The MCU is reset when the supply voltage is below the power-on reset threshold (VPOT).  
External reset. The MCU is reset when a low level is present on the RESET pin for longer than the minimum pulse  
length.  
Watchdog reset. The MCU is reset when the watchdog timer period expires and the watchdog is enabled.  
Brown-out reset. The MCU is reset when the supply voltage VCC is below the brown-out reset threshold (VBOT) and the  
brown-out detector is enabled.  
Figure 7-1. Reset Logic  
DATA BUS  
MCU Status  
Register (MCUSR)  
Power-on Reset  
Circuit  
VCC  
Brown-out  
BODLEVEL [2.. 0]  
RESET  
Reset Circuit  
Pull-up Resistor  
INTERNAL  
RESET  
Q
Spike  
Filter  
Reset Circuit  
S
R
Watchdog  
Timer  
Watchdog  
Oscillator  
Delay Counters  
CK  
Clock  
Generator  
TIMEOUT  
CKSEL[3:0]  
SUT[1:0]  
38  
ATmega16/32/64/M1/C1 [DATASHEET]  
7647O–AVR–01/15  
 
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