4.
Memories
This section describes the different memories in the Atmel® ATmega16/32/64/M1/C1. The AVR architecture has two main
memory spaces, the data memory and the program memory space. In addition, the Atmel ATmega16/32/64/M1/C1 features
an EEPROM Memory for data storage. All three memory spaces are linear and regular.
4.1
In-system Reprogrammable Flash Program Memory
The Atmel ATmega16/32/64/M1/C1 contains 16K/32K/64K bytes on-chip in-system reprogrammable flash memory for
program storage. Since all AVR® instructions are 16 or 32 bits wide, the Flash is organized as 8K x 16, 16K x 16 , 32K x 16.
For software security, the flash program memory space is divided into two sections, boot program section and application
program section.
The flash memory has an endurance of at least 10,000 write/erase cycles. The Atmel ATmega16/32/64/M1/C1 program
counter (PC) is 14/15 bits wide, thus addressing the 8K/16K/32K program memory locations. The operation of boot program
section and associated boot lock bits for software protection are described in detail in Section 24. “Boot Loader Support –
Read-while-write Self-Programming ATmega16/32/64/M1/C1” on page 241. Section 25. “Memory Programming” on page
255 contains a detailed description on flash programming in SPI or parallel programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM – Load Program Memory.
Timing diagrams for instruction fetch and execution are presented in Section 3.7 “Instruction Execution Timing” on page 15.
Figure 4-1. Program Memory Map
Program Memory
0x0000
Application Flash Section
Boot Flash Section
0x1FFF/0x3FFF/0x7F
4.2
SRAM Data Memory
Figure 4-2 shows how the Atmel ATmega16/32/64/M1/C1 SRAM memory is organized.
The Atmel ATmega16/32/64/M1/C1 is a complex microcontroller with more peripheral units than can be supported within the
64 locations reserved in the Opcode for the IN and OUT instructions. For the extended I/O space from 0x60 - 0xFF in SRAM,
only the ST/STS/STD and LD/LDS/LDD instructions can be used.
The lower 2304 data memory locations address both the register File, the I/O memory, extended I/O memory, and the
internal data SRAM. The first 32 locations address the register file, the next 64 location the standard I/O memory, then 160
locations of extended I/O memory, and the next 1024/2048/4096 locations address the internal data SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with Displacement, Indirect, Indirect with Pre-
decrement, and Indirect with Post-increment. In the register File, registers R26 to R31 feature the indirect addressing pointer
registers.
18
ATmega16/32/64/M1/C1 [DATASHEET]
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
